On-Chip Clock Generator Tuning for Mixed-Signal Noise Avoidance

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Solution Overview

Problem

Mixed-signal integrated circuit chips face noise interference from digital circuits, which degrades analog circuit performance due to substrate noise coupling, power ripples, and EMI, leading to jitter and data transmission errors.

Innovation Solution

Incorporating on-chip precision and non-precision tunable oscillators, with noise detectors and control circuits that adjust frequencies to mitigate noise by using a precision frequency reference, allowing the oscillators to operate at desired frequencies different from noise frequencies, thereby reducing interference and improving signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If digital circuits operate at high speed on the same chip, then productivity increases, but noise interference increases causing analog circuit performance degradation

Engineering Contradiction:

Improveprocessing speedVSAvoidnoise interference

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the chip into distinct analog and digital portions with separate clock domains. The analog portion contains precision oscillators while the digital portion contains non-precision oscillators, physically separating noise sources from sensitive circuits to maintain high processing speed without degrading analog performance

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediate frequency conversion stage where digital signals are converted to analog through DACs, and analog signals are converted to digital through ADCs. This intermediary conversion process allows high-speed digital processing while isolating noise through controlled frequency translation and filtering

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a precision oscillator is continuously operated to maintain frequency accuracy, then reliability improves, but power consumption increases

Engineering Contradiction:

Improvefrequency accuracyVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic oscillator selection where the system switches between precision and non-precision oscillators based on operational requirements. The precision oscillator is activated only when high frequency accuracy is needed, while non-precision oscillators handle routine operations, optimizing the balance between reliability and power consumption

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of oscillators by adjusting their frequency and activation state. The precision oscillator operates at full accuracy only when required, while non-precision oscillators operate at reduced accuracy for routine tasks, and both can be shut down during low-activity periods to minimize power consumption while maintaining frequency accuracy when needed

Inventive Principle:

Principle #35Parameter changes

3Object-affected harmful factors

If non-precision tunable oscillators are used to avoid noise frequencies, then noise resistance improves, but frequency stability deteriorates

Engineering Contradiction:

Improvenoise resistanceVSAvoidfrequency stability

Core Design Contradiction:

Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent performs preliminary frequency detection and adjustment by monitoring noise spectra and pre-adjusting oscillator frequencies to avoid noisy bands before they affect signal quality. This proactive approach maintains frequency stability by establishing safe operating frequencies in advance while providing noise resistance through frequency avoidance

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where noise detectors continuously monitor the electromagnetic environment and provide real-time information to the oscillator control system. The system adjusts oscillator frequencies based on this feedback to avoid noise frequencies while maintaining stability through controlled frequency transitions and validation

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS7961040B2Accuracy on-chip clock generator for multi-clock driven single chip solution

Publication Date: 2011.06.14 OMNIVISION INT HLDG

AI summary

A mixed-signal chip is described. The mixed-signal chip comprises a first portion of analog circuit and second portion of digital circuit, an on-chip precision oscillator residing on the first analog portion, the precision oscillator has a precision frequency; a first on-chip non-precision tunable oscillator from a first clock domain residing on the first analog portion, the first non-precision tunable oscillator has a first adjustable frequency; a noise detector for detecting a first noise in the first clock domain; a frequency adjusting register for storing a first desired frequency value of the first on-chip non-precision tunable oscillator, wherein the first desired frequency value is determined based on the first detected noise; a control circuit for adjusting the adjustable frequency of the first non-precision tunable oscillator to the first desired frequency value by using the precision frequency of the on-chip precision oscillator as a reference.