Clock Generator Power Management During Device Power Loss
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Solution Overview
Problem
Computing devices lose timing synchronization during power loss due to exhaustion of reserve power, requiring a substantial time to reacquire synchronization data upon power restoration.
Innovation Solution
A system and method that selectively shuts down non-essential components while maintaining the operation of the clock generator component, allowing it to continue generating timing information and synchronize with other devices, thereby preserving synchronization during power loss and enabling quick resumption of data communications upon power restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reserve power is used to operate the microcontroller and communications unit during power loss, then the device can maintain basic communication functions, but the stored power becomes exhausted in a relatively short amount of time and the clock generator shuts down causing loss of timing synchronization
Solution Approach 1:
The patent extracts the clock generator component from the group of components powered during power loss, separating it from the microcontroller and communications unit. By taking out only the essential timing function and powering it independently from reserve power, the solution extends the duration reserve power lasts while maintaining critical timing synchronization capability.
Solution Approach 2:
The patent applies local quality by providing different power management strategies to different components. The clock generator receives priority power allocation from reserve power to maintain timing functions, while other non-essential components are powered down or use different power sources, optimizing the overall power distribution during power loss conditions.
2Duration of action of moving object
If the clock generator is shut down during power loss to conserve reserve power, then reserve power duration is extended, but the device loses timing synchronization with other computing devices
Solution Approach 1:
The patent applies preliminary action by maintaining the clock generator operation during power loss before synchronization data is lost. By keeping the clock running and continuously generating timing information during the power loss period, the device preserves timing synchronization without needing to reacquire synchronization data after power restoration, thus preventing information loss.
3Ease of operation
If all components are powered during power loss, then the device maintains full functionality, but reserve power is exhausted quickly requiring substantial time to reacquire synchronization
Solution Approach 1:
The patent segments the device components into essential (clock generator) and non-essential (microcontroller, communications unit) groups for power management during power loss. By segmenting the power allocation, the clock generator continues operating on reserve power while other components are powered down, preventing synchronization loss and eliminating the time required to reacquire synchronization data after power restoration.
Data Source
AI summary
In transferring data between a first computing device having a first clock generator component and a second computing device having a second clock generator component, timing information is generated by at least the first clock generator component and is shared over a communication channel with the second computing device to synchronize the first and second clock generator components. Upon detecting that power available to the first computing device has fallen below a designated threshold level, the first computing device enters a power loss mode. Upon entering the power loss mode, the first computing device selectively inactivates one or more designated components by a power module while continuing operation of at least the first clock generator component to maintain the synchronizing timing information associated with the second clock generator component.