Clock Generator Trimming Control for Spread-Spectrum EMI Reduction
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Solution Overview
Problem
Conventional clock generators that spread clock spectra to reduce electromagnetic interference (EMI) require large analogue charge current adjustment circuits, increasing the size of the oscillator and prolonging testing times, necessitating a trade-off between comprehensive testing and cost due to the high number of analogue nodes.
Innovation Solution
A clock generator configuration that includes an oscillator, a first frequency divider, and a trimming controller, which adjusts the trimming code within the period of the frequency division clocks to finely change the charge time of a capacitor, thereby spreading the spectrum of clocks without an analogue charge current adjustment circuit, allowing for efficient EMI reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an analogue charge current adjustment circuit is used to spread the clock spectrum, then EMI is reduced, but the oscillator size increases and testing time increases
Solution Approach 1:
The patent replaces the analogue charge current adjustment circuit with a digital frequency adjustment mechanism. Instead of using analogue elements to adjust charge current in multiple stages, the invention uses a frequency divider and counter to generate spread spectrum clock signals through digital frequency division and phase modulation, thereby eliminating the need for complex analogue circuitry while achieving EMI reduction
Solution Approach 2:
The patent changes the frequency parameter of the clock signal through digital division ratios. By varying the division ratio of the frequency divider based on spread spectrum codes, the clock frequency is dynamically adjusted to spread the spectral content, achieving EMI reduction without requiring analogue current adjustment circuits
2Object-affected harmful factors
If an analogue charge current adjustment circuit is used to spread the clock spectrum, then EMI is reduced, but testing time increases
Solution Approach 1:
The patent replaces the analogue charge current adjustment circuit with a digital frequency adjustment mechanism. Instead of using analogue elements to adjust charge current in multiple stages, the invention uses a frequency divider and counter to generate spread spectrum clock signals through digital frequency division and phase modulation, thereby eliminating the need for complex analogue circuitry while achieving EMI reduction
Solution Approach 2:
The patent uses simple digital logic elements (frequency divider, counter, XOR gate) that are easier to manufacture and test compared to analogue circuits. These digital components have well-defined test states and can be efficiently tested using standard digital testing methods, reducing overall testing time and cost
3Reliability
If the number of analogue nodes is increased for comprehensive testing, then defect detection ratio increases, but test cost increases
Solution Approach 1:
The patent replaces the analogue charge current adjustment circuit with a digital frequency adjustment mechanism. Instead of using analogue elements to adjust charge current in multiple stages, the invention uses a frequency divider and counter to generate spread spectrum clock signals through digital frequency division and phase modulation, thereby eliminating the need for complex analogue circuitry while achieving EMI reduction
Solution Approach 2:
The patent uses digital logic circuits that can be efficiently copied and tested using standard digital testing methodologies. The frequency divider, counter, and XOR gate structures are well-established digital building blocks with known test procedures, allowing for comprehensive defect detection without requiring expensive custom test equipment or extended testing time
Data Source
AI summary
According to a clock generator, an oscillator outputs source oscillation clocks which are trimmed according to a trimming code. A first frequency divider generates X frequency division clocks by frequency-dividing the source oscillation clocks by a first frequency division ratio X. A trimming controller changes the trimming code within a period of the X frequency division clocks and supplies the changed trimming code to the oscillator.


