Clock Generator Voltage Pumping for Faster VCO Operation
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Solution Overview
Problem
CMOS image sensors face limitations in increasing the oscillation frequency of voltage controlled oscillators without significant power consumption, as the control voltage is typically limited to the power-supply voltage level, restricting the output range and processing speed.
Innovation Solution
A clock generator is designed with a phase frequency detector, voltage converter, filter circuit, and voltage pumping circuit to generate a pumped control voltage higher than the power-supply voltage, which is used by a voltage controlled oscillator to increase its oscillation frequency, thereby enhancing processing speed without excessive power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the control voltage of the voltage controlled oscillator is increased to raise the oscillation frequency, then the processing speed is improved, but the power consumption increases significantly
Solution Approach 1:
The patent implements a dual-mode voltage controlled oscillator that dynamically switches between normal operation mode (using control voltage within power supply range) and pumping operation mode (using pumped control voltage exceeding power supply voltage). This dynamic operation allows the system to achieve high oscillation frequencies when needed while maintaining low power consumption during normal operation, resolving the contradiction between speed and power usage.
Solution Approach 2:
The voltage pumping circuit operates periodically rather than continuously, being activated only when high oscillation frequency is required. The circuit alternates between charging the capacitor during normal operation and pumping voltage when high-speed processing is needed, thereby achieving high speed performance without continuous power consumption increase.
2Productivity
If the control voltage is limited to the power-supply voltage level, then the power consumption is kept low, but the output range and processing speed are restricted
Solution Approach 1:
The patent extends the control voltage dimension by introducing a voltage pumping circuit that can generate voltages exceeding the power supply voltage level. This additional voltage dimension allows the oscillator to achieve higher frequencies and broader output ranges while maintaining compatibility with the existing power supply architecture, thereby improving productivity without sacrificing adaptability.
Solution Approach 2:
The voltage pumping circuit performs preliminary voltage accumulation by charging a capacitor during normal operation, then releases this accumulated voltage to achieve pumped control voltage levels when high processing speed is required. This preliminary action enables the system to突破 the power supply voltage limitation without continuous high power consumption.
Data Source
AI summary
A clock generator and an image sensor including the same are disclosed, which relate to technology for improving an operation speed of a voltage controlled oscillator. The clock generator includes a phase frequency detector (PFD) configured to detect a phase difference between a clock signal and a reference clock signal, a voltage converter configured to adjust a current corresponding to a voltage level in response to an output signal of the phase frequency detector (PFD), a filter circuit configured to generate a control voltage by filtering an output signal of the voltage converter, a voltage pumping circuit configured to pump an output voltage of the voltage converter, and provide the control voltage having a pumped voltage level, and a voltage controlled oscillator configured to generate a clock signal, an oscillation frequency of which is adjusted, in response to the control voltage.