Clock Jitter Monitor Using Internal Voltage Slope Sampling
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Solution Overview
Problem
High-speed signal transmission in computer systems and communication infrastructure requires precise timing accuracy, but existing jitter monitoring techniques face challenges in measuring jitter effectively without increasing power consumption or requiring external low-jitter clock signals.
Innovation Solution
A jitter monitor circuit comprising a voltage generating circuit, a voltage reducing circuit, and a sampling circuit that generates a voltage slope waveform independent of the jitter of the clock signal, allowing for jitter measurement without an external low-jitter reference, using a capacitor and current sources to maintain a reference voltage level, and adjusting the current or charge to synchronize with the clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sizes of transistors are increased to reduce jitter, then timing accuracy is improved, but power consumption increases
Solution Approach 1:
The jitter measurement function is segmented from the main data path circuits. A dedicated jitter monitor circuit with separate components (voltage generating circuit, voltage reducing circuit, sampling circuit) measures jitter independently, allowing the main transmission circuits to operate at high speed without being burdened by measurement overhead, thus reducing overall power consumption while maintaining timing accuracy.
Solution Approach 2:
The patent introduces a voltage slope waveform as an intermediary reference signal that is independent of the clock signal's jitter. This voltage slope waveform serves as a mediator to convert timing jitter into voltage differences that can be measured without requiring external low-jitter reference clocks, thereby reducing power consumption while achieving accurate jitter measurement.
2Measurement precision
If external low-jitter reference clocks are used for jitter measurement, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The jitter monitor circuit is designed to be self-contained and self-sufficient. It generates its own voltage slope waveform internally using simple circuit elements (capacitor and current source) rather than requiring external reference clocks. The circuit measures jitter by comparing the clock signal phase against this internally generated waveform, eliminating the need for complex external reference sources and reducing overall device complexity.
Solution Approach 2:
The voltage generating circuit serves multiple functions: it generates the voltage slope waveform for jitter reference, provides a timing基准 for the sampling circuit, and can be integrated into various jitter measurement applications. This multi-functional design eliminates the need for separate external reference clock circuits, reducing device complexity while maintaining measurement precision.
3Productivity
If high data rates are achieved in signal transmission, then productivity is improved, but timing accuracy becomes more difficult to maintain
Solution Approach 1:
The patent replaces traditional mechanical or external reference-based timing measurement methods with an electronic voltage slope waveform generation approach. By converting the timing reference into an electronically generated voltage waveform that can be precisely controlled and measured, the system achieves accurate jitter measurement at high data rates without being constrained by external reference clock limitations, thus maintaining timing accuracy while supporting high productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate measurement of jitter in clock signals with a simple circuit configuration, reducing power consumption and eliminating the need for external low-jitter references, while maintaining timing accuracy for high-speed data transmission.
Implementation Method 1
a voltage generating circuit that generates a first voltage that is varied with time at a predetermined inclination
Implementation Method 2
a sampling circuit that samples a portion having the predetermined inclination of the second voltage
Data Source
AI summary
A jitter monitor includes: a voltage generating circuit configured to generate a first voltage that is varied with time at a predetermined inclination; a voltage reducing circuit configured to reduce the first voltage by a predetermined voltage in synchronization with a first clock signal so as to generate a second voltage that is varied with time at the predetermined inclination in synchronization with the first clock signal; and a sampling circuit configured to sample a portion having the predetermined inclination of the second voltage.