Clock Line Voltage Detection for Dual-Voltage Data Interfaces
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Solution Overview
Problem
Slave devices in data communication interfaces face challenges with reduced supply voltage compatibility, leading to performance degradation and increased cost and size when transitioning from 1.8 V to 1.2 V, while maintaining backward compatibility and avoiding extra pins.
Innovation Solution
Implementing a clock line voltage detector and a low drop-out (LDO) regulator in slave devices to detect and respond with either 1.8 V or 1.2 V output based on the detected voltage level, using a comparator and level shifter to toggle the output voltage accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If slave devices transition from 1.8 V to 1.2 V supply voltage, then power consumption is reduced, but performance degrades and compatibility is lost
Solution Approach 1:
The slave device dynamically adjusts its output voltage level based on the detected clock signal voltage. The voltage detector monitors whether the clock signal is at 1.8 V or 1.2 V level, and the slave device accordingly outputs data at the matching voltage level, enabling adaptive operation across different voltage conditions without performance degradation
Solution Approach 2:
The invention changes the voltage parameter of the data output based on the detected clock signal voltage. By detecting whether the clock signal operates at 1.8 V or 1.2 V, the slave device adjusts its output voltage parameter to match, ensuring compatibility and optimal performance at each voltage level while managing power consumption effectively
2Adaptability or versatility
If slave devices add voltage detection and regulation circuits, then voltage level compatibility is achieved, but device complexity increases
Solution Approach 1:
The voltage detector circuit serves multiple functions: it detects the clock signal voltage level (1.8 V or 1.2 V) and simultaneously provides this detection information to control the data output voltage level. This multi-functionality achieves voltage level compatibility without proportionally increasing device complexity
Solution Approach 2:
The slave device automatically detects the voltage level of the incoming clock signal and self-adjusts its output voltage level accordingly. This self-service mechanism eliminates the need for external voltage level translation circuits or complex control logic, achieving compatibility while minimizing added complexity
3Measurement precision
If slave devices use additional pins for voltage detection, then voltage level identification is improved, but cost and size increase
Solution Approach 1:
The existing clock line is used for dual purposes: clock signal transmission and voltage level indication. By detecting the voltage level on the clock signal itself, the slave device achieves accurate voltage level identification without requiring additional detection pins, thereby reducing cost and device size
Solution Approach 2:
The clock signal serves as an intermediary that carries both timing information and voltage level information. The voltage detector uses the clock signal's voltage characteristics to infer the required output voltage level, eliminating the need for separate voltage detection pathways and reducing overall system complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables slave devices to maintain performance and compatibility without additional pins, reducing cost and size, and ensuring effective communication with host devices at either 1.8 V or 1.2 V supply.
Implementation Method 1
the clock line voltage detector includes a comparator configured to compare a clock line voltage of the clock signal with a threshold voltage to produce a comparator output indicative of the detected voltage level
Implementation Method 2
the clock line voltage detector includes a low pass filter configured to filter the clock signal and to produce a filtered clock signal
Implementation Method 3
a level shifter configured to produce a clock level signal based on the comparator output
Implementation Method 4
a low drop-out regulator configured to toggle an output voltage of the low drop-out regulator between a first voltage level and a second voltage level in response to the detected voltage level
Data Source
AI summary
Mechanisms for detecting a voltage level on a data communication interface between a slave device and a host device are disclosed. Based on the detected voltage level, the slave device may respond to the host device on the data communication interface at the detected voltage level. The slave device may include a circuit configured to toggle between a first voltage level and a second voltage level to provide one of the first voltage level or the second voltage level corresponding to the detected voltage level on the data communication interface.