Clock Management Module Dynamic Frequency Adjustment

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Solution Overview

Problem

Modern computing systems, such as smartphones and tablets, face high power consumption due to clock frequencies designed for maximum performance, leading to inefficiency when components are idle, necessitating a balance between performance and power usage.

Innovation Solution

An electronic system with a clock management module that adjusts clock signals for multiple function modules based on their performance requirements, using a performance determining unit to assess needs and a clock mask unit to adjust frequencies by masking clock pulses, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If clock frequency is designed according to maximum performance requirements, then system performance is improved, but power consumption increases

Engineering Contradiction:
Improvesystem performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic clock frequency adjustment by establishing a correspondence relationship between performance requirements and clock frequencies. The system dynamically determines which function modules need high performance and assigns appropriate clock frequencies accordingly, rather than using a fixed high frequency for all modules. This dynamic adaptation allows the system to maintain maximum performance when needed while reducing clock frequency and power consumption when performance requirements are lower.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different clock frequencies to different function modules based on their individual performance requirements. Instead of uniform high-frequency operation across the entire system, each function module receives a customized clock frequency matched to its specific needs. This local optimization ensures that high performance is provided only where required, while other modules operate at lower frequencies to conserve power.

Inventive Principle:
Principle #3Local quality

2Productivity

If high clock frequency is used for all function modules, then maximum performance is achieved, but power consumption waste increases

Engineering Contradiction:
Improvemaximum performanceVSAvoidpower consumption waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent segments the system into multiple function modules, each with independent performance requirements and corresponding clock frequency assignments. By dividing the system this way, the patent can apply high clock frequencies only to specific modules that require maximum performance, while other modules operate at reduced frequencies. This segmentation prevents unnecessary energy consumption across the entire system while maintaining maximum performance where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the clock frequency parameter dynamically based on performance requirements. Instead of using a fixed high frequency parameter for all modules, the system adjusts the frequency parameter for each module according to its specific needs. This parameter change approach allows the system to achieve maximum performance when required while minimizing power consumption waste by reducing frequencies in modules that do not require high performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9996138B2Electronic system and related clock managing method
Publication Date: 2018.06.12 MEDIATEK INC
  • US9996138B2 patent drawing
  • US9996138B2 patent drawing
  • US9996138B2 patent drawing

AI summary

An electronic system includes a plurality of function modules, each of the plurality of function modules operates according to one of a plurality of clock signals; and a clock management module, for generating the plurality of clock signals according to a plurality of performances requirements of the plurality of function modules.