Clock Manager for IP-Based Media Timing Control

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Solution Overview

Problem

Traditional clock synchronization methods in media production studios, such as those using analog black burst or SMPTE timecode, lack a common point of control for endpoint devices when transitioning to IP-based synchronization protocols, leading to delayed propagation of timing adjustments across local clock signals.

Innovation Solution

Implementing an IP-based synchronization protocol that uses a master clock generator to distribute a master clock signal to endpoint devices, which generate local clock signals, and a clock manager to provide a common point of control for adjusting timing parameters across these devices, allowing for synchronized clock adjustments and phasing signals for video and audio streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If IP-based synchronization protocol is used to distribute master clock signal, then adaptability to modern digital networks is improved, but lack of common point of control causes delayed propagation of timing adjustments

Engineering Contradiction:
Improveadaptability to IP-based networksVSAvoiddelay in propagating timing adjustments
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent introduces a clock manager as an intermediary component that receives timing adjustments and propagates them to all endpoint devices. This mediator resolves the contradiction by providing a centralized control point in IP-based networks, enabling immediate propagation of timing adjustments while maintaining compatibility with modern digital network infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If local clock generators are used at endpoint devices, then reliability of local timing is improved, but difficulty in centralized control increases

Engineering Contradiction:
Improvereliability of local timingVSAvoidcomplexity of centralized control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the clock manager receives timing adjustment commands and automatically distributes them to all endpoint devices. This feedback loop maintains centralized control simplicity while allowing local clock generators to continue operating reliably, as they receive coordinated adjustment commands without requiring complex control logic at each device.

Inventive Principle:
Principle #23Feedback

3Ease of operation

If traditional analog timing systems are used, then ease of operation is maintained, but measurement precision and synchronization accuracy decrease

Engineering Contradiction:
Improveease of operationVSAvoidsynchronization accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent replaces traditional analog timing systems with digital IP-based synchronization protocols. This substitution maintains ease of operation through standardized digital communication while dramatically improving measurement precision and synchronization accuracy through the use of digital timecode and precise clock signal distribution over IP networks.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20180337765A1Providing common point of control and configuration in IP-based timing systems
Publication Date: 2018.11.22 DISNEY ENTERPRISES INC
  • US20180337765A1 patent drawing
  • US20180337765A1 patent drawing
  • US20180337765A1 patent drawing

AI summary

Embodiments herein describe a common point of control of local clocks in endpoint devices in a media production studio that are synchronized using an IP-based synchronization protocol. In one embodiment, a master clock generator outputs a master clock signal which is distributed to the endpoint devices in the media production studio. The endpoint devices include local clock generators that convert the master clock into an adjusted clock. A clock manager provides a common point of control for the local clock generators in the endpoints. The clock manager includes an input/output (I/O) interface which enables an engineer to adjust the jam time of the local clock generators as well as adjust a delay used when outputting media content to another endpoint device.