Clock Signal Masking Circuit for Bidirectional Bus
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Solution Overview
Problem
In integrated circuits with bidirectional data buses, clock lines often float in a high impedance state, leading to unintended signal latching due to parasitic capacitive coupling, causing errors in data transmission, and existing solutions complicate timing alignment with additional circuitry, increasing costs and complexity.
Innovation Solution
A clock masking system where the mask is triggered by the clock signal from the clock driver, using a gate and storage element like an AND gate and D flip-flop, ensuring precise masking at the trailing edge of the final clock cycle, eliminating premature or late masking issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a clock filter is used to mask the clock input when the clock line is not being driven, then the component is isolated from false transitions, but the system complexity increases due to additional masking circuitry
Solution Approach 1:
The clock driver that drives the clock line also generates the mask signal for its own clock input. The mask signal is derived from the clock driver's own output, allowing the system to mask false transitions without requiring separate masking circuitry. The clock driver serves dual functions: driving the clock line and generating the mask signal.
Solution Approach 2:
The clock driver is designed to perform multiple functions: it drives the bidirectional clock line during active communication and simultaneously generates the mask signal to prevent false transitions when the line is floating. This multi-functional approach eliminates the need for dedicated masking components.
2Measurement precision
If additional circuitry is added to align mask timing with clock transitions, then masking accuracy improves, but the cost and complexity of the system increase
Solution Approach 1:
The clock driver generates its own mask signal based on its own driving state of the clock line. Since the mask signal is derived from the same clock driver that controls the clock line timing, the mask automatically aligns with clock transitions without requiring separate timing alignment circuitry. The system uses itself to achieve precise timing synchronization.
Solution Approach 2:
The clock driver monitors its own output state on the clock line and uses this feedback to control the mask signal. When the clock driver detects that it is not driving the clock line (floating state), it automatically generates the mask signal to block false transitions, creating a self-regulating timing alignment mechanism.
Data Source
AI summary
A system and method are disclosed for masking a clock input from a clock line when the clock line is not being driven by a clock source. The clock mask is triggered by a clock cycle from the clock source. In one version, a memory controller configures a masking circuit to either allow a clock signal to the clock input or to mask the clock input from a bidirectional clock bus. The masking circuit may comprise a storage element and a gate, as an example.