Clock Multiplexing Circuit for Accurate High-Speed Edge Detection

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Solution Overview

Problem

As the frequency of clock signals increases to enhance data transmission speed in memory devices, the reliability of these devices decreases due to challenges in accurately determining rising and falling edge time points, leading to complex circuit designs with high power consumption and manufacturing costs.

Innovation Solution

A clock multiplexing circuit with a simpler structure is introduced, utilizing transistors to generate pulse signals based on the logic levels of input clock signals, which reduces circuit complexity and power consumption by eliminating the need for multiple inverters and transmission gates, while maintaining accurate edge detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the frequency of clock signal is increased to increase data transmission speed, then productivity is improved, but reliability deteriorates due to difficulty in accurately determining rising and falling edge time points

Engineering Contradiction:
Improvedata transmission speedVSAvoidoperational reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The clock signal processing is segmented into multiple phases (first clock signal and second clock signal with different phases). By dividing the single clock signal into phased segments, the circuit can accurately detect edge time points through phase comparison, thereby maintaining reliability while operating at high frequencies for improved data transmission speed.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If complex circuits with multiple inverters and transmission gates are used to accurately detect edge time points, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveedge detection accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates redundant circuit components (multiple inverters and transmission gates) from the traditional edge detection circuit. By using a simplified configuration with transistors that directly respond to phase-differentiated clock signals, the circuit maintains accurate edge detection capability while significantly reducing overall device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The transistor-based circuit structure serves multiple functions simultaneously: it acts as both the edge detection mechanism and the signal processing element. This multi-functional design replaces the need for separate inverters and transmission gates, achieving accurate edge detection with a universal, simplified circuit architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If complex circuits with multiple inverters and transmission gates are used to accurately detect edge time points, then measurement precision is improved, but manufacturing cost increases

Engineering Contradiction:
Improveedge detection accuracyVSAvoidmanufacturing cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The invention extracts and eliminates redundant circuit components (multiple inverters and transmission gates) from the traditional edge detection circuit. By using a simplified configuration with transistors that directly respond to phase-differentiated clock signals, the circuit maintains accurate edge detection capability while significantly reducing overall device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention replaces expensive, complex circuit components (multiple inverters and transmission gates) with simpler, more cost-effective transistor-based structures. This substitution uses readily manufacturable elements that reduce production costs while maintaining the required measurement precision for edge detection.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Measurement precision

If complex circuits with multiple inverters and transmission gates are used to accurately detect edge time points, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improveedge detection accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The invention extracts and eliminates redundant circuit components (multiple inverters and transmission gates) from the traditional edge detection circuit. By using a simplified configuration with transistors that directly respond to phase-differentiated clock signals, the circuit maintains accurate edge detection capability while significantly reducing overall device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention replaces expensive, complex circuit components (multiple inverters and transmission gates) with simpler, more cost-effective transistor-based structures. This substitution uses readily manufacturable elements that reduce production costs while maintaining the required measurement precision for edge detection.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS12158772B2Clock multiplexing circuit
Publication Date: 2024.12.03 SAMSUNG ELECTRONICS CO LTD
  • US12158772B2 patent drawing
  • US12158772B2 patent drawing
  • US12158772B2 patent drawing

AI summary

Disclosed is a clock multiplexing circuit which includes a first transistor that is between a first input terminal that receives a first input clock signal and an output terminal that outputs an output pulse signal and operates based on a logic level of a second input terminal receiving a second input clock signal, and a second transistor that is between the output terminal and a first voltage node and operates based on the logic level of the second input terminal. The first input clock signal and the second input clock signal have the same period and have different phases. The output pulse signal transitions to a first logic level at a first time when the first input clock signal transitions to the first logic level and transitions to a second logic level at a second time when the second input clock signal transitions to the first logic level.