Clock Network Monitoring with Selective Frequency Checks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing technologies for monitoring clock networks in integrated circuits require a large amount of on-chip resources, leading to inefficient resource consumption.
Innovation Solution
A method and apparatus for monitoring clock networks in integrated circuits that selectively monitor the clock frequency status of some clock nodes and detect the clock running status of others, reducing the overall resource consumption while maintaining full-coverage monitoring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full-coverage monitoring is achieved by monitoring clock frequency of each clock node, then monitoring coverage is improved, but on-chip resource consumption increases
Solution Approach 1:
The patent segments the clock network monitoring into two distinct parts: (1) clock frequency monitoring performed on a subset of clock nodes, and (2) clock running status monitoring performed on all clock nodes. This segmentation allows the system to achieve full coverage while reducing resource consumption by not performing frequency monitoring on every node.
Solution Approach 2:
The patent applies different monitoring strategies to different clock nodes based on local requirements. Critical clock nodes undergo both frequency monitoring and running status monitoring, while non-critical nodes undergo only running status monitoring. This local differentiation optimizes resource allocation while maintaining overall system reliability.
2Measurement precision
If clock frequency monitoring is performed on all clock nodes, then monitoring precision is improved, but device complexity increases
Solution Approach 1:
The monitoring system is segmented into frequency monitoring components and running status monitoring components. Frequency monitoring is applied selectively to critical nodes where high precision is needed, while running status monitoring is applied broadly to all nodes. This segmentation reduces overall system complexity while maintaining measurement precision where required.
Solution Approach 2:
Instead of performing full frequency monitoring on all nodes (excessive action), the patent applies frequency monitoring only to critical nodes (partial action). Running status monitoring is applied to all nodes to ensure basic coverage. This partial application of intensive monitoring reduces complexity while maintaining necessary precision.
Data Source
AI summary
This disclosure discloses a method and a device for monitoring a clock network in an integrated circuit. The method includes: monitoring a clock frequency status of a first clock node in a clock network in the integrated circuit; detecting a clock running status of a second clock node in the clock network; determining a running status of the clock network based on the clock frequency status of the first clock node and the clock running status of the second clock node. According to this disclosure, clock frequency status monitoring can be performed on only some clock nodes in the clock network, while clock running status detection can be performed on other clock nodes. The clock running status indicates whether the clock node is toggling normally. According to this disclosure, resource consumption for clock monitoring can be effectively reduced while full-coverage monitoring for clocks in the clock network is supported.