Clock Network Routing Structure Edge Intersection Detection

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Solution Overview

Problem

Traditional clock tree generation in electronic design automation (EDA) often results in resource overuse, leading to inferior clock networks due to late consideration of routing resources, which can be difficult to resolve without degrading the overall quality of the circuit design.

Innovation Solution

The proposed solution involves generating a routing structure for a clock network based on edge interaction detection, which allows for the detection and avoidance of routing resource overuse by adjusting branch points and using edge intersection checks during the bottom-up traversal of the routing structure, thereby ensuring a balanced and efficient resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional clock tree generation is used, then the clock network can be generated quickly, but routing resource overuse occurs leading to inferior clock network quality

Engineering Contradiction:

Improveclock network generation speedVSAvoidclock network quality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary consideration of routing resources during the clock tree generation process itself, rather than addressing resource conflicts later. By detecting potential edge intersections and resource overuse conditions upfront and adjusting the clock tree structure proactively, the system avoids inferior quality outcomes while maintaining generation efficiency.

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If routing resources are considered late in the process, then initial clock tree structure can be established quickly, but resource conflicts arise that are difficult to resolve without degrading design quality

Engineering Contradiction:

Improveclock tree structure establishmentVSAvoidresource conflict resolution

Core Design Contradiction:

Device complexityVSEase of manufacture

Solution Approach 1:

The system performs preliminary resource consideration by detecting edge intersections and evaluating routing resource usage during the clock tree generation process itself. This allows the structure to be established with proper resource awareness from the beginning, making conflict resolution straightforward rather than requiring complex post-processing adjustments.

Inventive Principle:

Principle #10Preliminary action

3Quantity of substance

If local optimizations are used to resolve resource conflicts, then routing resources can be adjusted, but the overall quality of the circuit design deteriorates

Engineering Contradiction:

Improverouting resource allocationVSAvoidcircuit design quality

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

By considering routing resources preliminarily during the main generation process rather than applying local optimizations afterward, the system achieves proper resource allocation without the need for quality-degrading post-processing adjustments. The clock tree is generated with resource awareness built-in from the start.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10929589B1Generating routing structure for clock network based on edge intersection detection

Publication Date: 2021.02.23 CADENCE DESIGN SYST INC

AI summary

Various embodiments provide for generating a routing structure for a clock network based on edge interaction detection, which can facilitate detection/consideration of overuse of routing resources to a balanced routing structure and which may be part of electronic design automation (EDA) of a circuit design. For example, some embodiments use an edge intersection check to detect overuse of routing resources within the routing structure for a clock network.