Clock Oscillation Circuit with Dynamic Capacitance Adjustment

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Solution Overview

Problem

Conventional semiconductor devices face challenges in generating a high-accuracy clock signal due to error factors such as transistor variations, temperature characteristics, and power supply variations, which affect the stability and accuracy of clock frequency.

Innovation Solution

A semiconductor device with a clock oscillation circuit that includes a power supply terminal, a current output circuit adjustable for power supply voltage and temperature, a frequency-voltage conversion circuit with parallel electrostatic capacitive elements, and a clock setting portion to adjust the clock signal frequency by varying the number of electrostatic capacitive elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional clock oscillation circuit with fixed components is used, then the device size is reduced and external components are eliminated, but the clock frequency accuracy deteriorates due to transistor variations and environmental factors

Engineering Contradiction:
Improveclock frequency accuracyVSAvoidcircuit configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the capacitance value adjustable through switching between multiple electrostatic capacitive elements. The frequency-voltage conversion circuit includes a first electrostatic capacitive element portion and a second electrostatic capacitive element portion that can be selectively connected in parallel, allowing the total capacitance to be dynamically adjusted to compensate for environmental variations and maintain accurate clock frequency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the capacitance parameter by providing multiple electrostatic capacitive elements with different capacitance values. The clock setting portion selectively connects these elements in parallel to achieve different total capacitance values, thereby adjusting the oscillation frequency to compensate for transistor variations and temperature effects, improving clock frequency accuracy.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the number of electrostatic capacitive elements is increased to improve frequency accuracy, then the manufacturing precision is improved, but the device area increases

Engineering Contradiction:
Improvefrequency accuracyVSAvoiddevice area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent segments the total capacitance into multiple discrete electrostatic capacitive elements. Instead of using one large capacitor, the circuit uses several smaller capacitive elements (first electrostatic capacitive element portion and second electrostatic capacitive element portion) that can be selectively connected. This segmentation allows precise frequency adjustment while distributing the area requirement across multiple smaller components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic switching between different combinations of electrostatic capacitive elements. The clock setting portion selectively connects capacitive elements in parallel based on the desired frequency setting, allowing the effective capacitance to be dynamically adjusted. This dynamic configuration enables high frequency accuracy without permanently occupying the area of all possible capacitive elements simultaneously.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for high-accuracy clock signal generation and improved reliability of semiconductor devices by minimizing the impact of transistor variations and environmental factors on clock frequency accuracy.

Implementation Method 1

a frequency-voltage conversion circuit (13) which has a plurality of electrostatic capacitive elements (113, 114) capable of being coupled in parallel to a capacitive node (112) for receiving the output current

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8368472B2Oscillation circuit
Publication Date: 2013.02.05 RENESAS ELECTRONICS CORP
  • US8368472B2 patent drawing
  • US8368472B2 patent drawing
  • US8368472B2 patent drawing

AI summary

A high-accuracy clock signal is generated even when the settings of the clock frequency are changed or there is a variation in power supply, temperature, or the like. A frequency-voltage conversion circuit includes a switch portion including switches, electrostatic capacitive elements, and other switches. The electrostatic capacitive elements have different absolute capacitance values, and are provided so as to cover a frequency range intended by a designer. For example, based on 4-bit frequency adjustment control signals, the other switches select the electrostatic capacitive elements having the electrostatic capacitance values thereof each weighted with 2 to perform the switching of a frequency.