Clock Phase Compensation for Frequency Modulation Jitter
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Solution Overview
Problem
Clock frequency modulation in memory devices and graphics systems leads to phase errors and jitter due to electromagnetic interference (EMI), which existing technologies have not effectively addressed.
Innovation Solution
A system and method that modulates a clock signal's frequency and inserts a phase compensation offset to mitigate phase errors, using a phase compensation circuit that determines the offset based on observed phase changes or modulation values, thereby compensating for the phase errors caused by frequency modulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If clock frequency modulation is applied to reduce peak energy and EMI, then electromagnetic interference is reduced, but phase errors and jitter are introduced
Solution Approach 1:
The patent applies preliminary anti-action by calculating a compensation value based on the modulation amount before the phase error occurs, and applying this compensation to the clock signal in advance. The phase compensation circuit computes the compensation value from the modulation amount and applies it to offset the anticipated phase error, thereby preventing the phase error from degrading signal quality while maintaining the EMI reduction benefits of frequency modulation.
2Use of energy by moving object
If clock frequency is modulated to spread signaling energy, then peak energy is reduced, but signal alignment deteriorates
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the phase of the clock signal based on the modulation amount. The phase compensation circuit changes the phase parameter of the clock signal in response to frequency modulation, thereby maintaining signal alignment precision while allowing the frequency to be modulated for spreading signaling energy and reducing peak energy consumption.
Data Source
AI summary
The disclosed computer-implemented method includes providing, by a reference clock circuit, a clock signal for a clock-triggered element triggered by the clock signal and modulating, by a frequency modulation circuit, a frequency of the clock signal. The method also includes inserting, by a phase compensation circuit, a phase compensation offset to the modulated clock signal in a manner that compensates for a phase error produced by modulating the frequency of the clock signal. Various other methods, systems, and computer-readable media are also disclosed.