Clock Phase Control for SoC Supply Voltage Droop Detection
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Solution Overview
Problem
Systems on chip (SoC) experience temporary voltage droops during significant computational loads, leading to malfunctions due to the lack of effective voltage variation detection and timing control mechanisms.
Innovation Solution
An integrated circuit is designed to detect supply voltage variations using a phase of the clock signal, employing a clock delay circuit and phase controller to generate delay clock signals with controlled phases, and a detection circuit to generate signals indicating voltage changes, allowing for timely adjustments in clock signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a reference clock signal is supplied to a SoC and peripheral circuits use generated clock signals for operation, then the system can operate with battery power using low power design, but temporary voltage droop occurs during significant computational loads causing malfunction
Solution Approach 1:
The patent implements a voltage droop detection mechanism that proactively monitors supply voltage before malfunction occurs. The detection circuit continuously compares the actual supply voltage against a reference voltage, and when a droop is detected, the system preemptively adjusts or stops clock signal transmission to peripheral circuits, preventing malfunction before it happens.
Solution Approach 2:
The patent establishes a feedback loop where the detection circuit monitors the supply voltage and feeds this information back to control the clock signal transmission. When voltage droop is detected, the feedback mechanism triggers a response to adjust the clock signal, creating a closed-loop control system that maintains reliability while operating on battery power.
2Measurement precision
If the detection circuit continuously monitors voltage variations, then voltage droop can be detected early, but the device complexity increases
Solution Approach 1:
The patent introduces a reference voltage as an intermediary element to simplify voltage detection. Instead of directly monitoring absolute voltage levels, the detection circuit compares the supply voltage against a stable reference voltage, making the detection process simpler and more reliable. This intermediary approach reduces the complexity of the detection circuit while maintaining high measurement precision.
Solution Approach 2:
The patent changes the detection parameter from absolute voltage level monitoring to voltage difference comparison. By using a reference voltage and detecting deviations from this reference, the system achieves accurate voltage droop detection with simpler circuitry, as it only needs to detect relative changes rather than absolute values.
Data Source
AI summary
An integrated circuit configured to detect a variation in a supply voltage using a phase of an input clock signal dependent on the variation in the supply voltage may include a clock delay circuit configured to delay the input clock signal output from a clock generator using each of different delay cell chains and generate a first delay clock signal and a second delay clock signal; and a phase controller configured to control a first phase so that a difference between the first phase and a second phase is 180 degrees, the first phase being a phase of the first delay clock signal, the second phase being a phase of the second delay clock signal.