Clock Regeneration Circuit Using Histogram-Based Phase Recovery
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Solution Overview
Problem
Existing clock regeneration circuits in radio communication face challenges in accurately synchronizing clock signals with input signals, particularly in environments with signal jitter and dispersion, leading to suboptimal phase adjustment of clock signals.
Innovation Solution
A clock regeneration circuit that includes a detection section for identifying transition points, a histogram generation section for associating partial periods with transition points, a calculation processing section for generating and processing histograms to calculate phase adjustment values, and a phase adjustment section for synchronizing the clock signal based on these calculations, effectively averaging histogram values within predetermined phase ranges to improve phase accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a histogram is generated to determine the representative phase for clock signal synchronization, then the phase adjustment capability is improved, but the calculation complexity and processing time increase
Solution Approach 1:
The reference period is divided into multiple partial periods, and the histogram is generated by associating transition points with these segmented partial periods. This segmentation allows for more precise phase measurement while enabling efficient calculation through structured data organization.
Solution Approach 2:
The histogram generation section pre-processes the transition points and associates them with partial periods before the calculation processing section performs the final phase determination. This preliminary organization of data reduces the computational burden during the critical phase adjustment calculation.
2Measurement precision
If the clock signal phase is adjusted based on histogram maximum value, then synchronization accuracy is improved, but the system becomes more sensitive to signal jitter and dispersion
Solution Approach 1:
Instead of relying solely on the maximum value of the histogram, the system calculates the representative phase by considering the distribution characteristics across multiple partial periods. This parameter change from peak-based to distribution-based measurement makes the system more robust against jitter and dispersion while maintaining synchronization accuracy.
Solution Approach 2:
The histogram generation section acts as an intermediary that transforms raw transition point data into a structured distribution pattern. This intermediary representation allows the calculation processing section to determine the representative phase in a way that is less sensitive to signal deterioration, as the distributed pattern provides redundancy and context.
3Measurement precision
If multiple partial periods are associated with transition points for histogram generation, then phase measurement resolution is improved, but the data processing load increases
Solution Approach 1:
The reference period is segmented into multiple partial periods, which improves phase measurement resolution by providing finer granularity for transition point association. The structured segmentation enables efficient processing through systematic data organization and reduced computational redundancy.
Solution Approach 2:
The system processes transition points by associating them with multiple partial periods, which provides redundant information that improves measurement precision. This partial repetition of processing across segments enhances resolution while the structured approach prevents excessive computational overhead.
Data Source
AI summary
A clock regeneration circuit according to the present invention that generates a clock signal that is synchronized to an input signal, includes: a detection section which detects points at which the input signal transitions; a histogram generation section which associates a plurality of partial periods with the transition points, and generates a first histogram indicating an incidence of the transition points for each of the partial periods, the partial periods being generated by dividing a reference period of the clock signal; a calculation processing section which generates a second histogram by calculation processing based on the first histogram, and calculates a phase adjustment value of the clock signal based on the second histogram; and a phase adjustment section which adjusts a phase of the clock signal based on the phase adjustment value.