Clock Phase Interpolator Using Weighted Signals for Fine Phase Control

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Solution Overview

Problem

Phase interpolators in computer systems face challenges in achieving improved performance and reduced power consumption, particularly in generating fine phase increments between cyclic input signals while maintaining efficiency and control over clock signals.

Innovation Solution

A phase interpolator system that includes a clock signal with a phase offset, a control section to regulate the strength of the clock signal, and a generator circuit to produce an alternate clock signal, utilizing passive and active circuit elements such as variable resistors, capacitors, and inverters, along with a weighting circuit and phase rotation controller, to achieve precise phase control and reduced power dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional analog phase-locked loops and delay-locked loops are used for phase interpolation, then phase control capability is achieved, but power consumption is high and integration efficiency is low

Engineering Contradiction:
Improvepower consumptionVSAvoidintegration efficiency
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent replaces conventional analog phase-locked loops and delay-locked loops with a digital-based phase interpolator system. The digital system uses binary-weighted current sources and digital control signals to achieve phase interpolation, substituting the analog mechanical/electrical systems with a digital architecture that consumes less power and integrates more efficiently into modern digital circuits

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the operating parameters by using binary-weighted current sources where the current magnitude is controlled by digital control signals. By varying the binary weights of current sources (I, 2I, 4I, 8I) and their switching states, the system achieves continuous phase adjustment with fine granularity while maintaining low power consumption and high integration capability

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If fine phase increments are generated between input signals, then phase control precision is improved, but device complexity increases

Engineering Contradiction:
Improvephase control precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the phase control function into multiple binary-weighted current sources (I, 2I, 4I, 8I) that can be independently controlled. Each current source corresponds to a specific binary weight and can be switched on or off based on control signals. This segmentation allows fine phase increments to be achieved by combining different weighted currents, providing precise phase control while keeping the circuit structure modular and manageable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The phase interpolator system serves multiple functions: it generates fine phase increments, provides continuous phase adjustment over 360 degrees, and interfaces with digital control logic. The binary-weighted current source architecture universally handles all phase control requirements through a single integrated structure, eliminating the need for separate circuits for different phase control ranges and resolutions

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8004335B2Phase interpolator system and associated methods
Publication Date: 2011.08.23 GLOBALFOUNDRIES US INC
  • US8004335B2 patent drawing
  • US8004335B2 patent drawing
  • US8004335B2 patent drawing

AI summary

A phase interpolator system is disclosed that may include a clock to provide a clock signal, and a control section in communication with the clock to regulate the strength of the clock signal. The system may also include a generator circuit to produce an alternate clock signal based upon the strength of the clock signal received from the control section.