Clock Phase Detection Using Binary Sampling and Interval Convergence
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current phase detection methods in wireless communication systems, particularly in MIMO technology, suffer from low precision and increased complexity, making it difficult to achieve high-precision phase synchronization across multiple channels, especially in high-frequency bands like 5G communications.
Innovation Solution
A phase detection method that involves sampling a clock signal to obtain binary sequences, determining initial phase intervals, standardizing these intervals based on a reference phase, and converging them to obtain precise phase information, which simplifies the algorithm and reduces computational overhead while achieving fast phase convergence and high precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional phase detection methods are used, then phase detection can be performed, but the detection precision is low and the algorithm complexity is high
Solution Approach 1:
The phase detection process is segmented into distinct stages: sampling the clock signal to obtain binary sequences, determining initial phase intervals from these sequences, standardizing the phase intervals based on a reference, and converging the standardized intervals to obtain final phase information. This segmentation transforms a complex monolithic detection algorithm into manageable modular steps, reducing overall complexity while maintaining precision
Solution Approach 2:
The patent replaces traditional complex mathematical operations (matrix multiplication, arctangent functions) with a simplified computational approach based on binary sequence sampling and phase interval analysis. This substitution eliminates the need for heavy computational machinery while achieving superior phase detection precision through a more elegant mathematical framework
2Measurement precision
If high-precision phase detection is achieved through traditional methods, then detection accuracy improves, but computational overhead and circuit complexity increase
Solution Approach 1:
The patent extracts only the essential information needed for phase detection by sampling the clock signal to obtain binary sequences, rather than processing the entire signal spectrum. This extraction approach focuses computational resources on the critical phase information while discarding redundant data, thereby improving both precision and efficiency
Solution Approach 2:
The patent changes the parameter representation from continuous signal processing to discrete phase interval analysis. By transforming the detection problem into determining intervals within a standardized range and then converging these intervals, the method achieves high precision with reduced computational overhead, as interval operations are more efficient than traditional matrix operations
3Reliability
If complex algorithms like matrix multiplication are used, then phase detection can be performed, but circuit complexity and implementation difficulty increase
Solution Approach 1:
The patent substitutes complex matrix multiplication operations with simpler binary sequence sampling and phase interval calculations. This replacement dramatically simplifies the circuit implementation requirements, as the new method can be realized with basic digital logic components rather than complex programmable processors, thereby improving ease of manufacture while maintaining synchronization reliability
Solution Approach 2:
The patent employs a detection method that uses simple, easily manufactured digital components rather than expensive complex processing units. The binary sequence sampling and phase interval determination can be implemented with basic flip-flops, counters, and comparators, making the circuit more economical and easier to manufacture while achieving the same reliability goals
Data Source
AI summary
A phase detection method and apparatus, and a storage medium and an electronic apparatus are provided. A sampling operation is performed on a clock signal to be detected to obtain binary sequences. Phase intervals of the clock signal to be detected in initial sampling periods are determined, according to the binary sequences, as first phase intervals. Based on a reference phase interval in the first phase intervals, a standardization operation is performed on other phase intervals in the first phase intervals to obtain second phase intervals, wherein the reference phase interval is a phase interval determined within a first sampling period after the sampling operation is triggered, and the other phase intervals are phase intervals determined within sampling periods following the first sampling period. The second phase intervals are converged, and phase information of the clock signal to be detected is obtained according to the converged second phase intervals.