Clock Phase Inversion Circuit for Noisy Signal Sampling Alignment

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Solution Overview

Problem

In human body communication systems, noise interference during signal transmission through the human body poses challenges for efficient signal reception, requiring high-performance receivers to align the clock phase with the input signal phase accurately.

Innovation Solution

An electronic circuit comprising an oscillating circuit, phase inverting circuit, and phase detecting circuit that adjusts the clock phase based on the phase difference between the input signal and the clock, using a phase detecting circuit to generate control signals for the phase inverting circuit to align the clock with the input signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the clock phase is adjusted to align with the input signal phase, then the sampling margin is improved and noise interference is reduced, but the device complexity increases due to the need for phase detecting and phase inverting circuits

Engineering Contradiction:
Improvesignal reception performanceVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The phase detecting circuit continuously monitors the phase difference between the input signal and the clock signal, and generates a control signal that feeds back to the phase inverting circuit. This feedback mechanism enables automatic phase alignment, improving signal reception reliability while managing complexity through automated control rather than manual adjustment.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The phase adjustment system is self-regulating through the phase detecting circuit that automatically detects phase differences and generates appropriate control signals. The system serves itself by continuously monitoring and correcting its own timing alignment without external intervention, thereby improving reliability while keeping the control mechanism integrated and relatively simple.

Inventive Principle:
Principle #25Self-service

2Productivity

If the phase adjustment is performed quickly to improve signal reception, then the sampling margin is enhanced, but the manufacturing precision requirements increase for the phase detecting circuit

Engineering Contradiction:
Improvephase adjustment speedVSAvoidphase detection accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The phase inverting circuit adjusts the clock phase by changing the timing parameter of the clock signal based on control signals from the phase detecting circuit. By dynamically changing the phase parameter rather than physically adjusting circuit components, the system achieves quick phase adjustment while maintaining reasonable manufacturing precision requirements for the detecting circuit.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10644710B2Electronic circuit for adjusting phase of clock
Publication Date: 2020.05.05 ELECTRONICS & TELECOMM RES INST
  • US10644710B2 patent drawing
  • US10644710B2 patent drawing
  • US10644710B2 patent drawing

AI summary

The inventive concept includes an oscillating circuit, a phase inverting circuit, and a phase detecting circuit. The oscillating circuit generates a first clock to be used to sample an input signal. The phase inverting circuit outputs a second clock based on the first clock. The phase detecting circuit generates a control signal having a first logic value when a phase difference between a phase of the input signal and a phase of the second clock is less than a reference value for a reference time or more. The phase detecting circuit generates the control signal having a second logic value when the phase difference is equal to or greater than the reference value or when the phase difference is less than the reference value for a time shorter than the reference time. The phase inverting circuit inverts the phase of the second clock when a logic value of the control signal changes from the first logic value to the second logic value or when a logic value of the control signal changes from the second logic value to the first logic value.