Multi-Phase Clock Generation With Stable 8-Phase to 4-Phase Switching
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Solution Overview
Problem
Existing multi-phase signal generation systems face challenges in transitioning between different phase modes, such as eight-phase and four-phase signals, due to indeterministic phase shifts and changes in load on clock generators, which can disrupt phase-locked loops and prevent seamless transitions during operations like cellular phone calls.
Innovation Solution
An apparatus and method that utilize 2^(n) phase signal generation stages with a controller to provide active periodic binary signals and steady state signals, maintaining the same load on clock generators across modes, ensuring deterministic phase relationships and reducing power consumption by switching between 2^(n) and 2^(n-1) phase signals based on transmitter power levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the system transitions between different phase modes (e.g., eight-phase to four-phase signals), then the power consumption is reduced, but the phase relationship becomes indeterministic and the clock generator load changes
Solution Approach 1:
The patent applies preliminary action by pre-configuring the signal generation stages to maintain deterministic phase relationships during mode transitions. The system prepares the phase signals in advance so that when transitioning between eight-phase and four-phase modes, the phase relationships remain predictable and stable, avoiding disruptions to the phase-locked loop while still achieving power savings.
2Reliability
If the system uses 2^n phase signal generation stages with active periodic binary signals, then the phase signal quality is improved, but the power consumption increases
Solution Approach 1:
The patent applies dynamics by making the signal generation system adaptable and configurable. The system can dynamically switch between different operational modes (2^n phase mode and 2^(n-1) phase mode) based on power requirements. By controlling which stages receive active periodic binary signals versus steady state signals, the system optimizes the balance between phase signal quality and power consumption in real-time.
3Use of energy by moving object
If the system switches between 2^n and 2^(n-1) phase modes, then the power consumption is reduced, but the transition may disrupt the phase-locked loop
Solution Approach 1:
The patent applies preliminary action by pre-configuring the phase signals and maintaining deterministic phase relationships before mode transitions occur. This preparation ensures that when switching between 2^n and 2^(n-1) phase modes, the phase-locked loop experiences minimal disruption and the transition remains smooth and controlled.
4Reliability
If the system maintains deterministic phase relationships during mode transitions, then the phase-locked loop stability is improved, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the signal generation system into multiple controllable stages. Each stage can be independently configured to receive either active periodic binary signals or steady state signals. This modular segmentation allows the system to maintain deterministic phase relationships through coordinated control of individual stages, achieving phase-locked loop stability without requiring overly complex monolithic control mechanisms.
Data Source
AI summary
The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2{circumflex over ( )}n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2{circumflex over ( )}n stages with an active periodic binary signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with another periodic binary signal to collectively generate a 2{circumflex over ( )}n phase signal in a first mode. The controller is further configured to provide the mode input of each of 2{circumflex over ( )}(n−1) odd stages with a first steady state signal and the mode input of each of 2{circumflex over ( )}(n−1) even stages with a second steady state signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with the same periodic binary signal as in the first mode to cause either the 2{circumflex over ( )}(n−1) odd stages or the 2{circumflex over ( )}(n−1) even stages to collectively generate a 2{circumflex over ( )}(n−1) phase signal in a second mode.