Multi-Phase Clock Alignment Circuit for Phase Mismatch Calibration
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Solution Overview
Problem
Existing multi-phase clock signal generation systems face phase mismatch issues due to errors between input clock signals, signal transmission errors, and selector phase errors, which affect the linearity of digitally controlled delay lines and hinder precise phase difference detection and calculation.
Innovation Solution
A multi-phase clock signal phase difference detection and calculation circuit comprising an auxiliary and main digital-to-time conversion circuit, a phase detector, and a state machine, which adjusts clock signals to align phases and calculates phase differences between multiple clock signals, ensuring accurate phase alignment and linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple orthogonal clock signals are input into the digitally controlled delay line, then the delay time range is reduced and linearity is improved, but phase mismatch errors are introduced
Solution Approach 1:
The patent applies preliminary action by detecting and calculating phase differences between multi-phase clock signals before they are used in the delay line. The phase detection and calculation circuit measures the actual phase differences and stores calibration data in advance, which is then used to compensate for phase mismatch errors during operation, ensuring both improved linearity and reduced phase errors
Solution Approach 2:
The patent implements feedback by using the detected phase difference information to adjust and compensate for phase mismatch errors. The phase detector and calculator provide feedback about the actual phase relationships, which are then used to correct the clock signals or delay line operation, maintaining both the reduced delay range benefit and the phase accuracy requirement
2Measurement precision
If phase detection and calibration circuitry is added to correct phase mismatch, then phase accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the phase detection and calibration function into separate modular components: a phase detector that measures phase differences, a phase calculator that computes calibration values, and a storage element for calibration data. This modular segmentation allows for precise phase measurement while keeping each component relatively simple and manageable
Solution Approach 2:
The patent uses an intermediary approach by introducing a dedicated phase detection and calculation circuit that acts as a mediator between the multi-phase clock signals and the delay line. This intermediary circuit measures and compensates for phase errors without requiring complex modifications to the main delay line architecture, thus improving phase accuracy while limiting overall complexity increase
Data Source
AI summary
The present disclosure provides a multi-phase clock signal phase difference detection and calculation circuit and method, and a digital phase modulation system. The detection and calculation circuit includes an auxiliary digital-to-time conversion circuit, a main digital-to-time conversion circuit, a phase detector, and a state machine. The auxiliary digital-to-time conversion circuit selects a first phase clock signal and outputs an auxiliary clock signal, adjusts the phase of the auxiliary clock signal; the phase detector detects the phases of the auxiliary clock signal and a target clock signal output by the main digital-to-time conversion circuit; the state machine adjusts the phase of the auxiliary clock signal, and adjusts the phase of the target clock signal. When the phase difference between the two signals is zero, the amount of phase adjustment by the main digital-to-time conversion circuit is the phase difference between the first phase clock signal and the second phase clock signal.