Ranging Accuracy via Clock Phase Offset Segmentation
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Solution Overview
Problem
Current ranging techniques in wireless communication systems face challenges in achieving accurate distance measurements between devices due to limitations in clock synchronization and the impact of finite clock resolution, leading to uncertainties in time-of-flight calculations.
Innovation Solution
The system employs a method to refine time-of-flight estimates by conducting multiple measurements with phase offsets in the sampling clock, adjusting for clock granularity uncertainties, and calculating a refined estimate based on differences between subsequent time-of-flight measurements, thereby improving ranging accuracy without increasing the sampling clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling clock frequency is increased to improve time-of-flight measurement precision, then measurement precision improves, but device complexity and power consumption increase
Solution Approach 1:
The patent segments the time-of-flight measurement process into multiple discrete sampling phases with different clock phase offsets. Instead of using a single high-frequency clock, the system performs multiple measurements at a lower clock frequency with phased offsets, dividing the measurement task into segments that collectively achieve higher precision equivalent to a higher frequency system.
Solution Approach 2:
The patent changes the parameter of clock phase offset across multiple measurements rather than increasing clock frequency. By varying the phase offset parameter of the sampling clock across different measurement cycles, the system achieves improved time-resolution and measurement precision without changing the fundamental clock frequency, thus avoiding the complexity and power costs of higher-frequency operation.
2Measurement precision
If the sampling clock frequency is increased to reduce uncertainty in time-of-flight estimates, then measurement precision improves, but power consumption increases
Solution Approach 1:
The measurement process is segmented into multiple low-power sampling phases rather than one high-power high-frequency operation. Each phase uses the base clock frequency, keeping power consumption low, but the collective result of phased measurements achieves the precision that would otherwise require a higher frequency and thus higher power consumption.
Solution Approach 2:
The system changes the phase offset parameter of the clock across measurements rather than increasing frequency. This parameter change approach maintains the clock at a lower, more power-efficient frequency while still achieving improved measurement precision through the phase diversity of multiple measurements.
3Measurement precision
If multiple measurements with phase offsets are performed to reduce uncertainty, then measurement precision improves, but measurement time increases
Solution Approach 1:
The patent employs periodic sampling measurements with different clock phase offsets. Instead of continuous high-frequency sampling, the system performs periodic measurements at discrete phase offsets, which reduces the total measurement time compared to continuous high-rate sampling while still achieving high precision through the phase-diverse sample set.
Solution Approach 2:
The system skips intermediate sampling points and directly measures at strategically chosen phase offsets. Rather than taking every possible sample point, it selectively samples at key phase positions, rushing through the measurement process efficiently while capturing sufficient information to achieve high precision through mathematical processing of the phased samples.
Data Source
AI summary
A system and method for estimating the range between two devices performs two or more ranging estimates with subsequent estimates performed using a clock that is offset in phase with respect to a prior estimate. The subsequent estimate allows estimate uncertainties due to a finite clock resolution to be reduced and can yield a range estimate with a higher degree of confidence. In one embodiment, these additional ranging estimates are performed at n/N (for n=1, . . . N−1, with N>1 and a positive integer) clock-period offset introduced in the device. The clock-period offset can be implemented using a number of approaches, and the effect of clock drift in the devices due to relative clock-frequency offset can also be determined. To eliminate the bias due to clock-frequency offset, a system and method to estimate the clock-frequency offset is also presented.