Clock Phase Measurement With Wild-Clock Sampling and Delay Alignment
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Solution Overview
Problem
High-speed electronics face synchronization issues due to unpredictable time delays in clock signals, which can lead to data loss or misinterpretation, especially in clock forwarded systems where low swing differential input clock signals are noisy and distorted, and prior art systems struggle with precise fractional spacing and alignment.
Innovation Solution
A multiphase measurement and control system using a reference clock signal, a multiphase delay line, and a wild clock for simultaneous sampling and phase adjustment, enabling precise fractional unit interval phase offset measurement and alignment of output clock signals relative to the reference clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a forwarded clock signal is propagated through the receiver device internal components, then the clock signal can be used for timing operations, but an unpredictable time delay is introduced that varies with temperature, process, and voltage
Solution Approach 1:
The patent implements a feedback mechanism where the receiver device measures the actual time delay of the forwarded clock signal and communicates this information back to the sender device. The sender device then adjusts its clock signal timing based on this feedback to compensate for the measured delay, resolving the synchronization issue caused by unpredictable time delays.
Solution Approach 2:
The patent replaces traditional mechanical delay adjustment mechanisms with an electronic measurement and communication system. Instead of physically adjusting delay elements, the system uses digital measurement of time delay and electronic communication to convey delay information, allowing for precise and dynamic compensation.
2Measurement precision
If multiple phases of the clock signal are produced and aligned correctly, then accurate data sampling can be achieved, but precise fractional spacing (e.g. 13/16ths) of a unit interval is required which is difficult to achieve
Solution Approach 1:
The patent implements a self-service mechanism where the system automatically measures and adjusts its own phase alignment without requiring external calibration or manual adjustment. The receiver measures the time delay and phase relationships, and this information is used to automatically adjust the clock signal timing, enabling precise fractional spacing to be achieved through self-calibration.
3Reliability
If low swing differential input clock signals are used in clock forwarded systems, then data integrity is maintained, but the clock signal becomes small, noisy and distorted from intersymbol interference (ISI) so it may not be directly usable by the receiver
Solution Approach 1:
The patent applies preliminary action by measuring the time delay and characterizing the clock signal quality before the receiver attempts to use the signal for data sampling. This advance measurement allows the system to pre-adjust timing and compensate for signal degradation, making the noisy and distorted low swing differential clock signal usable for accurate data reception.
Data Source
AI summary
Methods and apparatuses for clock signal phase measurement and control are described. In one example, a clock signal phase measurement system includes a reference clock signal line to provide a reference clock signal, a delay line to provide an output clock signal, and a wild clock. The clock signal phase measurement system includes a phase sensor configured to randomly and simultaneously sample the reference clock signal and the output clock signal utilizing the wild clock to obtain a phase data. The phase sensor is further configured to measure from the phase data a phase difference between the reference clock signal and the output clock signal.