Compact Shift Register Using Clock Pulses for Node Discharge
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Solution Overview
Problem
Conventional shift registers for liquid crystal displays (LCDs) face issues with high load on the discharging voltage source line, leading to potential malfunction and increased size, which limits their integration in LCD panels.
Innovation Solution
The proposed shift register design reduces the load on the discharging voltage source line by using clock pulses to discharge nodes instead of a dedicated discharging voltage source, and optimizes the number of nodes and switching devices, allowing for a more compact structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated discharging voltage source is used to maintain node discharge state, then the node can be properly discharged, but the load on the discharging voltage source line increases significantly
Solution Approach 1:
The clock pulse signal is made to serve dual functions: driving the output transistor and discharging the node. By controlling the output transistor to connect the node to the clock pulse line, the clock signal simultaneously performs its driving function and discharges the node when low, eliminating the need for a dedicated discharging voltage source and reducing line load.
Solution Approach 2:
The discharging function is merged with the clock pulse signal transmission. Instead of using a separate discharging voltage source, the patent combines the discharge path with the existing clock pulse line, allowing the same signal line to both drive the output and discharge the node, thereby reducing the number of dedicated discharge lines and their associated load.
2Ease of operation
If at least two nodes and multiple switching devices are used to control the nodes, then the node control function is achieved, but the shift register size increases
Solution Approach 1:
The patent extracts and eliminates redundant components from the conventional design. By removing the dedicated discharging voltage source and its associated switching devices, and by simplifying the node control mechanism to use the existing clock pulse line, the design reduces the number of components while maintaining node control functionality, thereby reducing overall shift register size.
Solution Approach 2:
The clock pulse line is given multiple functions: it drives the output transistor during high phases and discharges the node during low phases. This multi-functionality eliminates the need for separate control lines and switching devices for node discharge, reducing the overall component count and device area while maintaining full control capability.
Data Source
AI summary
A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.