Clock Signal Generation Circuit With Random Modulation for EMI Reduction
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Solution Overview
Problem
Existing clock signal generation circuits in switching power supply devices result in significant electromagnetic interference (EMI) interference due to fixed frequency noise, particularly in the technical field, the frequency of the clock signal generation circuit is fixed, leading to increased radiated noise and degraded EMI characteristics.
Innovation Solution
A clock signal generation circuit that modulates the frequency of the clock signal using a parameter value asynchronously set to the internal clock signal, generating a modulation signal that fluctuates randomly, reducing peak noise by varying the frequency and amplitude of the clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the frequency of the clock signal is fixed, then the clock signal generation circuit operates stably, but the radiated noise at that frequency increases
Solution Approach 1:
The patent applies dynamics by making the clock signal frequency variable rather than fixed. The oscillation frequency is dynamically adjusted by adding a modulation signal to the oscillation control voltage, causing the frequency to fluctuate within a predetermined range. This dynamic frequency variation suppresses radiated noise while maintaining stable operation through controlled randomness.
Solution Approach 2:
The patent changes the frequency parameter of the clock signal by superimposing a modulation signal on the oscillation control voltage. This parameter change transforms the fixed frequency into a variable frequency, spreading the noise energy across a wider bandwidth and reducing peak noise levels while maintaining overall system stability.
2Object-generated harmful factors
If spread spectrum technology is used to suppress radiated noise, then the noise is spread over a wide bandwidth, but the circuit complexity increases
Solution Approach 1:
The patent merges the noise suppression function with the existing clock signal generation circuitry. The modulation signal generation is integrated into the phase-locked loop structure, combining the VCO, PLL, and modulation functions in a unified circuit architecture. This reduces overall circuit complexity compared to separate noise suppression stages.
Solution Approach 2:
The circuit generates its own modulation signal internally using the VCO's inherent characteristics and the PLL structure. The modulation signal is created by naturally fluctuating the oscillation control voltage through the interaction of the phase detector and voltage-controlled elements, eliminating the need for external modulation signal sources or additional dedicated noise suppression circuits.
Data Source
AI summary
A clock signal generation circuit comprises a counter that updates a count value in synchronization with an internal clock signal; a timing setting circuit that sets a sampling timing based on a signal asynchronous to the internal clock signal; a holding circuit that acquires and holds the count value at the sampling timing as a parameter value; a signal generation circuit that generates a modulation signal having characteristics corresponding to the parameter value held in the holding circuit; and an oscillator that generates a target clock signal having a frequency corresponding to the modulation signal.