Asynchronous Network Clock Rate Matching via Segmented Frequency Adjustment
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Solution Overview
Problem
In asynchronous networks, determining the egress clock rate to match the ingress clock rate is challenging due to jitter and varying data arrival intervals, leading to frequent rate adjustments that can cause the serial receiver to lose lock and result in errors.
Innovation Solution
The method involves calculating a seed rate based on average data transmission, setting high and low thresholds, and using coarse and fine frequency adjustments to stabilize the buffer depth, gradually tuning the egress clock rate to match the ingress clock rate, thereby minimizing disruptions and data loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the clock rate is frequently adjusted to match the ingress clock rate, then the synchronization accuracy is improved, but the serial receiver may lose lock and errors are caused
Solution Approach 1:
The frequency adjustment process is segmented into two distinct phases: coarse frequency adjustment to rapidly approach the target frequency, and fine frequency adjustment to precisely match the target frequency. This segmentation allows the system to achieve synchronization accuracy without causing excessive disruptions that would make the receiver lose lock.
Solution Approach 2:
The system dynamically switches between coarse and fine adjustment modes based on the current frequency deviation. When the deviation is large, coarse adjustment is applied; when the deviation is small, fine adjustment is applied. This dynamic adaptation allows the system to respond appropriately to different synchronization conditions, maintaining both accuracy and stability.
2Loss of substance
If coarse frequency adjustment is applied to prevent buffer overflow/underflow, then data loss is prevented, but the clock rate becomes unstable and may overshoot the actual rate
Solution Approach 1:
The system performs preliminary coarse frequency adjustment when buffer overflow or underflow is detected, taking immediate action to prevent data loss. However, this preliminary action is followed by fine frequency adjustment to stabilize the clock rate, ensuring that the temporary drastic adjustment does not cause persistent instability or overshooting.
Solution Approach 2:
The system uses fine frequency adjustment as a cushioning mechanism that follows coarse adjustment. This fine adjustment compensates for any overshooting or instability caused by the coarse adjustment, cushioning the system against excessive frequency deviations while maintaining the benefits of the preliminary coarse adjustment in preventing data loss.
3Adaptability or versatility
If multiple rate determinations are made to handle jitter, then the adaptability to varying data arrival intervals is improved, but the serial receiver loses lock due to rate changes in different directions
Solution Approach 1:
The system dynamically adapts its frequency adjustment strategy based on the current synchronization state and buffer conditions. By switching between coarse and fine adjustment modes and by monitoring buffer depth, the system can handle jitter variations without causing the receiver to lose lock, as the adjustments are made in a controlled, progressive manner rather than through multiple conflicting rate determinations.
Data Source
AI summary
Techniques are provided for calculating a clock rate for a serial clock of a transmitter where information sent by the transmitter is sent in packets from the transmitter over an asynchronous network. The techniques involve minimizing the number of adjustments to the clock rate that are needed to fine tune the clock rate to match the serial clock of the transmitter.