Clock Frequency Ratio Monitoring for SoC Clock Tamper Detection
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Solution Overview
Problem
System on Chip (SoC) devices rely heavily on valid clock signals for operation, but are vulnerable to hacking attacks that can introduce fatal errors or expose sensitive information, as malicious actors can manipulate clock signals, leading to internal logic malfunctions and security breaches.
Innovation Solution
A frequency monitor mechanism is implemented within the SoC to detect hacked clock signals by comparing two clock signals and determining if their frequency ratio matches an expected ratio, generating an error signal if the ratio does not match, thereby identifying and responding to potential hacking attempts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If clock signals are used for synchronous operation in SoC, then operation efficiency and coordination are improved, but vulnerability to hacking attacks and clock signal manipulation increases
Solution Approach 1:
The patent implements preliminary verification of clock signal integrity by monitoring frequency ratios before they can be exploited by attackers. The frequency ratio monitor continuously checks whether the ratio between different clock signals matches expected values, detecting potential hacking attempts before they can cause fatal errors or information exposure.
Solution Approach 2:
The patent establishes a feedback mechanism where the frequency ratio monitor continuously monitors clock signals and provides feedback about their integrity. When the monitored frequency ratio deviates from expected values, the system generates error signals that can trigger corrective actions, creating a closed-loop security system that actively responds to potential attacks.
2Reliability
If frequency ratio monitoring is implemented to detect hacked clock signals, then security and reliability are improved, but device complexity increases
Solution Approach 1:
The frequency ratio monitor is designed to serve multiple functions: it monitors clock signal integrity, detects hacking attempts, validates frequency relationships, and provides error signaling. By consolidating these security functions into a single monitoring mechanism, the patent reduces overall system complexity compared to implementing separate verification circuits for each function.
Solution Approach 2:
The patent monitors clock signal frequency ratios as a key parameter to detect hacking. By focusing on this specific parameter rather than analyzing all aspects of clock signals, the monitoring mechanism achieves effective security detection with reduced complexity. The system changes its monitoring approach from examining individual clock frequencies to examining their relationships and ratios.
Data Source
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AI summary
An apparatus comprising a frequency monitor circuitry to receive a first clock signal, a second clock signal and an expected frequency ratio, determine whether a ratio between the first clock signal and the second clock signal matches an expected an expected frequency ratio and generate an error signal upon a determination that the ratio between the first clock signal and the second clock signal does not match the expected frequency ratio.