Clock Reconstitution Receiver Using Differential Transition Detection
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Solution Overview
Problem
Advanced intra Panel interface (AIPI) systems face difficulties in clock reconstitution due to severe variations in reference and input signal levels, leading to clock signal misgeneration and desynchronization of clock and data signals.
Innovation Solution
A receiver for clock reconstitution is implemented, featuring a termination resistor, a strobe signal generator with a low-frequency filter and fast-transition detector, which generates a strobe signal based on differential voltage output, allowing clock signal generation without relying on reference signals, and a clock reconstitutor to produce a clock signal from the strobe signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference signals are used to detect clock levels in AIPI, then clock reconstitution can be achieved, but severe variations in reference and input signal levels cause discrimination errors between clock and data levels
Solution Approach 1:
The patent extracts the clock signal detection function from reference signal comparison and implements it through transition detection of the differential signal itself. The receiver detects transitions in the differential signal IN-INB to generate clock timing, eliminating dependency on reference signals REFH/REFL and their level matching.
Solution Approach 2:
The patent changes the detection parameter from absolute voltage level comparison (which is sensitive to variations) to transition rate detection (which is robust against level variations). By detecting when the differential signal transitions between logic levels, the system achieves reliable clock recovery independent of reference signal quality.
2Reliability
If clock signal is generated by comparing input signals with reference signals, then clock reconstitution is possible, but transition time differences cause desynchronization between clock and data signals
Solution Approach 1:
The patent extracts clock timing information directly from the differential signal transitions rather than generating it through comparison logic. The clock signal is derived by detecting when IN-INB transitions occur, ensuring inherent synchronization with the data signal that shares the same physical channel.
Solution Approach 2:
The system uses the actual received differential signal transitions as feedback to generate the clock timing, creating a self-synchronized system where the clock automatically adapts to the actual signal characteristics including transition times, eliminating synchronization drift.
3Reliability
If AIPI system uses paired input signals and reference signals for clock detection, then clock reconstitution can be achieved, but the system requires multiple signal lines reducing integration efficiency
Solution Approach 1:
The differential signal IN-INB serves multiple functions simultaneously: it carries both data information and clock timing information. By detecting transitions in this single differential pair, the system recovers both data and clock without requiring separate reference signal lines, achieving multi-functionality from a single signal channel.
Data Source
AI summary
A receiver for clock reconstitution in a semiconductor field includes a termination resistor arranged between two input stages, to which a pair of input signals are input, the termination resistor including a first resistor and a second resistor; a strobe signal generator for generating a strobe signal, using a first signal corresponding to a differential voltage output from a node between the first resistor and the second resistor; and a clock reconstitutor for generating a clock signal in response to the strobe signal generated from the strobe signal generator.