Clock Recovery Circuit for Optical Receiver

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Solution Overview

Problem

Clock recovery in optical receivers is challenging due to signal distortions from chromatic dispersion, polarization-mode dispersion, and additive noise, especially when the eye pattern is substantially closed, which complicates data decoding at high data rates.

Innovation Solution

A clock-recovery circuit in the optical receiver uses a frequency-domain phase detector to determine and track the sampling phase of the analog-to-digital converter, allowing for synchronization of digital electrical samples with the internal clock without relying on dispersion-compensation processing, employing a Fourier-transform operation to generate digital spectral components and separate subsets for computing the sampling phase.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional clock recovery methods are used, then the system can operate with simple signal processing, but the bit-error rate increases significantly when the eye pattern is substantially closed due to signal distortions

Engineering Contradiction:
Improveclock recovery reliabilityVSAvoidsignal processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the digital spectral components into multiple subsets based on frequency ranges. The frequency-domain phase detector processes these subsets separately to determine sampling phase, allowing the system to handle distorted signals more effectively without requiring complex overall processing architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from time-domain signal processing to frequency-domain processing by applying Fourier-transform operations. This dimensional change allows the phase detector to extract sampling phase information from spectral components, improving clock recovery reliability when the eye pattern is closed due to chromatic dispersion and other distortions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If dispersion-compensation processing is applied to open the eye pattern, then signal quality improves, but the processing complexity and computational load increase

Engineering Contradiction:
Improvesignal qualityVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary spectral subsets required for clock recovery from the full digital signal spectrum. By processing only these selected subsets rather than the entire signal, the system achieves adequate signal quality for clock recovery without the full computational burden of complete dispersion compensation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial dispersion compensation by processing only specific frequency subsets that are most critical for clock recovery. This partial action approach provides sufficient signal quality improvement for reliable clock recovery while avoiding the excessive computational complexity of complete signal processing.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If all digital spectral components are processed for phase detection, then the sampling phase determination is more accurate, but the processing time and computational resources increase

Engineering Contradiction:
Improvesampling phase accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the digital spectral components into multiple frequency-based subsets and processes them separately in parallel. This segmentation allows the system to achieve accurate sampling phase determination through combined subset information while reducing the processing time compared to sequential analysis of all spectral components.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3414851B1Clock recovery for an optical receiver
Publication Date: 2020.07.15 NOKIA OF AMERICA CORP
  • EP3414851B1 patent drawingFigure 1
  • EP3414851B1 patent drawingFigure 2~3
  • EP3414851B1 patent drawingFigure 4~5

AI summary

We disclose an optical receiver for direct detection of an intensity-modulated optical signal, the digital signal processor of which employs a clock-recovery circuit capable of reliably recovering the internal clock of the received optical signal without relying on dispersion-compensation processing even if the signal's eye pattern is substantially closed. In an example embodiment, the clock-recovery circuit comprises a frequency-domain phase detector that operates to determine and track in time the sampling phase using only a subset of the digital spectral components corresponding to the received optical signal. The determined sampling phase is then used to synchronize the digital electrical samples of the received optical signal with the internal clock thereof by way of digital interpolation or through appropriate control of the sampling frequency and phase of the receiver's analog-to- digital converter. Some embodiments of the clock-recovery circuit can beneficially be used in a two-channel optical receiver.