Clock Recovery Delay Calibration for Jitter and Skew Stability
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Solution Overview
Problem
In high-speed serial bus protocols, the clock recovery circuit's delay time is prone to errors due to deviations in delay units, affecting data transmission as it varies with temperature and voltage changes, leading to jitter and skew issues.
Innovation Solution
A calibration method that calculates and adjusts the average delay time of each delay unit in the clock recovery circuit by using a reference signal source, synchronously sampling the reference and delay signals, and outputting a control signal to adjust the number of delay units, thereby stabilizing the delay time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If delay time is increased to compensate for circuit skew and jitter, then data transmission reliability is improved, but transmission delay increases and real-time performance deteriorates
Solution Approach 1:
The patent implements dynamic delay adjustment by making the delay time configurable and adjustable based on actual transmission conditions. The system can dynamically modify the delay parameter to optimize between reliability and real-time performance requirements, rather than using a fixed delay value.
Solution Approach 2:
The patent changes the delay time parameter according to different transmission scenarios and channel conditions. By adjusting this critical parameter, the system can adapt to varying requirements for reliability and real-time performance in different operating environments.
2Speed
If delay time is decreased to improve real-time performance, then transmission speed is improved, but data transmission reliability deteriorates due to increased susceptibility to jitter and skew
Solution Approach 1:
The system dynamically adjusts delay time based on real-time transmission conditions, allowing it to operate at lower delays for speed when conditions permit, while automatically increasing delay when jitter and skew become problematic, thus maintaining both speed and reliability.
Solution Approach 2:
The patent employs feedback mechanisms to monitor transmission quality metrics such as jitter and skew, and uses this information to adjust delay time accordingly. This closed-loop control ensures that speed is maximized while maintaining reliability through adaptive delay compensation.
3Measurement precision
If calibration is performed using data channel resources, then calibration accuracy is improved, but data transmission efficiency deteriorates due to occupied channel resources
Solution Approach 1:
The patent extracts the calibration function from the data channel by implementing a separate calibration mechanism that does not occupy data channel resources. This allows calibration to be performed independently while maintaining full data transmission efficiency during calibration operations.
Solution Approach 2:
The system introduces an intermediary calibration mechanism that mediates between calibration needs and data transmission requirements. This intermediary approach enables accurate calibration without interfering with or occupying the primary data channel resources.
Data Source
AI summary
The present disclosure provides a calibration method and readable computer storage medium. The calibration method includes: configuring a reference signal source to output a reference signal; delaying the reference signal through a delay chain to output a delay signal; synchronous sampling the reference signal and the delay signal; adding 1 count and obtaining a final count value when the sampling result is in the preset state; determining whether a ratio between the count value and the first quantity is within a preset range; obtaining the average delay time according to the time width of the reference signal wave and the number of the delay units opened in the delay chain when the ratio is within the preset range; and outputting a control signal to the clock recovery circuit according to the average delay time to calibrate the delay time of the clock recovery circuit.