Clock Recovery Delay Calibration for Multi-Wire Interfaces

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Solution Overview

Problem

In high-speed data communications, multi-wire interfaces face limitations due to varying signal transition times across different wires, which restrict the throughput of communication links and require significant delay elements, affecting clock recovery and data transmission efficiency.

Innovation Solution

A calibration method that detects transitions in a series of signals across multiple wires, derives a receive clock, determines a transition region, and calibrates a delay period using algorithms like successive approximation or linear search, allowing for precise timing adjustments to optimize data symbol reception.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a delay element is implemented in the CDR circuit to compensate for transition time differences, then the reliability of data recovery is improved, but the maximum clock period is restricted, reducing the throughput of the communication link

Engineering Contradiction:
Improvedata recovery reliabilityVSAvoidcommunication link throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the delay element adjustable rather than fixed. The delay amount is dynamically calibrated during a calibration phase and can be adjusted based on operating conditions, allowing the system to optimize between reliability and throughput requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the delay parameter of the delay element from a fixed value to a calibrated variable. By measuring actual transition time differences and adjusting the delay parameter accordingly, the system achieves reliable data recovery without unnecessarily limiting the clock period, thus improving throughput

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a large delay element is used to cover maximum transition time variation, then the reliability of symbol boundary detection is improved, but the operating speed of the communication link is reduced

Engineering Contradiction:
Improvesymbol boundary detection reliabilityVSAvoidcommunication link speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent performs preliminary calibration to determine the actual delay requirements before normal data transmission. By measuring transition times during a calibration phase and pre-configuring the delay element, the system avoids using excessive delay during operation, thereby maintaining higher transmission speeds while ensuring reliable symbol boundary detection

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If the delay element is calibrated using a calibration sequence, then the adaptability to varying transition times is improved, but the complexity of the calibration process is increased

Engineering Contradiction:
Improveadaptability to transition time variationsVSAvoidcalibration process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the system to automatically calibrate itself without external intervention. The calibration process uses built-in calibration sequences and internal measurement mechanisms to automatically determine and configure the appropriate delay values, reducing the need for manual calibration while maintaining high adaptability

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3025243B1Three phase clock recovery delay calibration
Publication Date: 2018.11.21 QUALCOMM INC
  • EP3025243B1 patent drawingFigure 1
  • EP3025243B1 patent drawingFigure 2
  • EP3025243B1 patent drawingFigure 3

AI summary

System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. A clock recovery circuit may be calibrated based on state transitions in a preamble transmitted on two or more connectors. A calibration method is described. The method includes detecting a plurality of transitions in a preamble of a multiphase signal and calibrating a delay element to provide a delay that matches a clocking period of the multiphase signal. Each transition may be detected by only one of a plurality of detectors. The delay element may be calibrated based on time intervals between detections of successive ones of the plurality of transitions.