Clock Data Recovery with Dual-Path Filtering for Noise and Offset Tracking
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Solution Overview
Problem
Conventional clock data recovery devices are limited by the bandwidth of their low-pass filters, leading to inadequate noise reduction and inability to track larger frequency offsets, especially in severe environment conditions such as rapid temperature changes.
Innovation Solution
A clock data recovery apparatus with a frequency control circuit that employs two different driving paths with varying low-pass filter bandwidths and gain values, allowing for a wider tracking range and enhanced noise reduction by summing bias voltages from these paths, enabling effective tracking of larger frequency offsets and noise suppression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the low-pass filter is implemented with a wider bandwidth, then the clock data recovery device can track larger frequency offset, but it cannot reduce more noise
Solution Approach 1:
The patent divides the single low-pass filter into two separate low-pass filters with different bandwidths (first and second bandwidths). Each filter processes the sampling signal independently through separate driving paths, allowing the system to simultaneously achieve wide tracking range (via the wider bandwidth filter) and effective noise reduction (via the narrower bandwidth filter), thereby resolving the contradiction between tracking capability and noise suppression.
Solution Approach 2:
The patent applies different filter bandwidths to different signal processing paths within the frequency control circuit. The first low-pass filter uses a first bandwidth optimized for tracking large frequency offsets, while the second low-pass filter uses a second bandwidth optimized for noise reduction. This local differentiation of filter characteristics allows each path to excel at its specific function, resolving the trade-off between tracking range and noise reduction.
2Object-affected harmful factors
If the low-pass filter is implemented with a narrower bandwidth, then the clock data recovery device can reduce more noise, but it cannot track larger frequency offset
Solution Approach 1:
The patent segments the filtering function into two independent low-pass filters with different bandwidth characteristics. The second low-pass filter with narrower bandwidth is dedicated to noise reduction in one driving path, while the first low-pass filter with wider bandwidth handles frequency offset tracking in another path. This segmentation eliminates the need to choose between noise reduction and tracking range, as both functions are simultaneously achieved through parallel processing.
Solution Approach 2:
The patent implements a dynamic frequency control circuit that can adaptively switch between or combine the outputs of two driving paths with different filter bandwidths. This dynamic configuration allows the system to optimize performance for different operating conditions - using the narrower bandwidth path when noise reduction is critical and the wider bandwidth path when tracking large frequency offsets is more important, thereby resolving the static trade-off between these two parameters.
Data Source
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AI summary
A clock data recovery apparatus (100, 200) includes an oscillator (105), a sampler circuit (110), and a frequency control circuit (115, 215). The oscillator generates a clock signal (SCLK) according to a bias voltage (VB). The sampler circuit (110) samples an input data signal (Sin) to generate a sampling signal (Ssample) according to the clock signal (SCLK). The frequency control circuit (115, 215) generates the bias voltage (VB) by performing integration calculation, digital-to-analog conversion, and low-pass filtering for the sampling signal (Ssample).