Clock Recovery Over Fixed-Rate Links for Variable-Rate Data

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Solution Overview

Problem

Variable data rate transmission systems, such as those using optic fiber links, face challenges in maintaining data integrity and distance due to the lack of support for clock signal transmission, leading to signal attenuation limitations.

Innovation Solution

The implementation of an unknown rate to fixed rate transmitter and a fixed rate to unknown rate receiver system, which inserts idle data to synchronize data transmission over a fixed rate link, allowing the receiver to recover the clock signal and maintain the original data rate, using FIFO queues and phase lock loops to manage data flow and jitter reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If variable rate data is transmitted using a fixed rate transmission system, then transmission distance is extended beyond cable limits, but clock signal synchronization is lost due to lack of clock signal transmission support

Engineering Contradiction:
Improvetransmission distanceVSAvoidclock signal synchronization
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism by embedding clock information within the data stream itself. Specifically, transitions in the data signal are used to encode clock information, allowing the receiver to recover the clock signal without requiring a separate clock transmission channel. This mediator approach resolves the contradiction by enabling synchronization while using only the data channel for transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The data signal serves multiple functions simultaneously: it carries both the actual data information and the clock synchronization information. By making the data signal universal, the system eliminates the need for separate clock transmission infrastructure, thereby extending transmission distance while maintaining synchronization reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a clock signal is provided to enable synchronization between transmitter and receiver, then data rate is fixed, but adaptability to variable data rates is lost

Engineering Contradiction:
Improvedata synchronizationVSAvoidvariable data rate support
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically adjusts the interpretation of data transitions based on the actual data rate being transmitted. The receiver detects transitions in the incoming signal and uses these transitions to dynamically generate a clock signal that adapts to the current transmission rate. This dynamic approach allows the system to maintain reliable synchronization while supporting variable data rates, resolving the contradiction between fixed clock requirements and rate adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The data signal itself provides the clock information needed for synchronization. Rather than requiring an external clock source, the system uses the transitions present in the data stream to self-generate the necessary clock signal. This self-service mechanism enables both reliable synchronization and adaptability to different data rates, as the clock is derived directly from the transmitted data regardless of its rate.

Inventive Principle:
Principle #25Self-service

3Reliability

If idle data is inserted between unknown rate data, then data rate synchronization is achieved over fixed rate link, but device complexity increases due to additional processing requirements

Engineering Contradiction:
Improvedata rate synchronizationVSAvoidtransmitter and receiver processing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the clock signal extraction function with the existing data reception and processing functions. Rather than adding completely separate clock recovery hardware, the system combines clock detection with the data signal analysis already performed for other purposes. This merging approach achieves reliable data rate synchronization while minimizing the increase in device complexity by reusing existing processing infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8873688B1Unknown rate clock recovery from fixed rate transmission system
Publication Date: 2014.10.28 ENTROPIC COMM INC
  • US8873688B1 patent drawing
  • US8873688B1 patent drawing
  • US8873688B1 patent drawing

AI summary

Systems and methods for transmitting data having a rate indicated by an associated clock signal, using a fixed rate transmission system are disclosed. One embodiment of the invention includes an unknown rate to fixed rate transmitter configured to receive unknown rate data and a clock signal that indicates the rate of the unknown rate data, and to transmit data at a fixed rate over a fixed rate link, a fixed rate to unknown rate receiver configured to receive fixed rate data including the unknown rate data via the fixed rate link, and to transmit the unknown rate data, and a recovered clock signal. In addition, the unknown rate to fixed rate transmitter is configured to insert idle data between the fixed rate data so that transmitting the combined unknown rate and idle data at the fixed rate over the fixed rate link results in the unknown rate data being transmitted over the fixed rate link at a rate corresponding to the rate indicated by the clock signal, and the fixed rate to unknown rate receiver is configured to accumulate the unknown rate data and generate a recovered clock signal based upon the rate at which the unknown rate data is accumulated by the fixed rate to unknown rate receiver.