Clock Recovery Using Frequency Accumulator and Phase Interpolator
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Solution Overview
Problem
Existing clock recovery systems struggle to accurately generate a clock signal from a datastream in the presence of noise and distortion, especially when large frequency changes occur, such as in frequency swept spread spectrum transmissions.
Innovation Solution
A clock recovery apparatus incorporating an early/late voter, a frequency accumulator, and a rate multiplier that generates control signals for a phase interpolator to adjust the clock signal, allowing for advanced or retarded sampling points, and enhancing frequency tracking capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a traditional clock recovery system is used, then the system structure is simple, but the frequency tracking capability is limited and cannot accurately track large frequency changes
Solution Approach 1:
The clock recovery system is segmented into multiple functional modules: early/late detector, frequency detector, phase interpolator, and frequency accumulator. Each module handles a specific aspect of frequency and phase tracking, allowing the system to track large frequency changes while maintaining manageable complexity through modular design
Solution Approach 2:
The invention transitions from traditional single-loop phase-locked loop architecture to a two-dimensional control approach by introducing both phase interpolation (for fine phase adjustment) and frequency accumulation (for coarse frequency tracking). This adds a frequency control dimension to the traditional phase control, enabling comprehensive tracking of both phase and frequency variations
2Adaptability or versatility
If the sampling point is fixed, then the system is simple to operate, but it cannot adapt to frequency changes in the datastream
Solution Approach 1:
The system employs feedback mechanisms where the early/late detector continuously monitors sampling timing errors and generates correction signals. The frequency detector monitors frequency deviations and adjusts the clock signal accordingly. This closed-loop feedback enables automatic adaptation to frequency changes without manual intervention
Solution Approach 2:
The clock recovery system performs self-adjustment through automated feedback loops. The early/late detector and frequency detector automatically detect deviations and trigger corrective actions via the phase interpolator and frequency accumulator, enabling the system to self-correct frequency and phase errors without external control
3Reliability
If noise and distortion are present in the datastream, then real-world signal conditions are represented, but accurate clock recovery becomes difficult
Solution Approach 1:
The phase interpolator acts as an intermediary between the detected phase errors and the clock signal generation. It provides smooth phase transitions and reduces the impact of noise-induced jitter by interpolating between discrete phase samples, thereby improving clock stability in noisy environments
Solution Approach 2:
The frequency accumulator provides beforehand cushioning by continuously accumulating frequency error information before it causes significant timing deviations. This proactive accumulation allows the system to prepare corrective frequency adjustments in advance, cushioning against the effects of noise and distortion before they degrade data recovery accuracy
Data Source
AI summary
Clock recovery apparatus having an early/late voter for deciding whether a current sampling point needs to be advanced or retarded, wherein the early/late voter passes and Up/Down signal to an interpolator for maintaining a clock signal; a frequency accumulator and rate multiplier 30 for generating further signals which are summed with those of the Up/Down signal of the early/late voter to provide an improved control signal to the phase interpolator. The accumulator is responsive to frequency changes in the input signal, and the interpolator acts on said Up/Down signals to adjust the clock signal by stepping it forward or backward according to control need, so that the sampling point can be advanced or retarded.