Serial Data Clock Recovery With Phase Shifting for HDMI Jitter
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Solution Overview
Problem
High-speed relative jitter between clock and data signals in HDMI communication systems makes it difficult for phase-shift clocks to accurately follow the phase of serial data, leading to unstable data reception, especially with high-frequency phase changes and limited opportunities for phase comparison.
Innovation Solution
A communication system with a phase synchronization circuit that adjusts the frequency of the received clock signal to generate a reproduction clock synchronized in phase with one serial data signal, and a phase shifter that locks the phase to another serial data signal, using a voltage-controlled oscillator, frequency divider, phase comparator, and selection circuit to manage alarm signals and phase feedback.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a phase-shift clock is used to adjust the phase of the clock generated by a PLL frequency multiply circuit, then the phase can be adjusted to match the serial data signal, but the clock cannot accurately follow high-speed phase changes due to relative jitter components
Solution Approach 1:
The patent divides the clock signal generation into two independent paths: a PLL frequency multiply circuit for frequency multiplication and a separate phase-shift circuit for phase adjustment. This segmentation allows each circuit to optimize for its specific function without compromising the other, enabling both accurate phase adjustment and high-speed phase following.
Solution Approach 2:
The patent introduces a phase-shift circuit as an intermediary component between the PLL frequency multiply circuit and the serial data signal. This intermediary adjusts the phase of the clock signal to match the serial data signal while maintaining the high-frequency characteristics from the PLL, resolving the contradiction between phase accuracy and speed.
2Device complexity
If the VCO clock is directly provided to samplers, then the circuit is simplified, but stable data reception cannot be achieved due to phase fluctuation between clock and data
Solution Approach 1:
The phase-shift circuit serves as a necessary intermediary between the VCO clock and the samplers. It adjusts the phase of the clock signal to synchronize with the serial data signal, ensuring stable data reception. While this adds a circuit component, it is a minimal addition that enables reliable operation.
Solution Approach 2:
The patent employs feedback control in the phase-shift circuit to continuously adjust the clock phase based on the phase relationship with the serial data signal. This feedback mechanism maintains synchronization and ensures stable data reception while keeping the overall system design straightforward.
3Measurement precision
If multiple phase-shift clocks are generated for multiple serial data signals, then each signal can be sampled accurately, but the device complexity increases
Solution Approach 1:
The patent merges the phase adjustment function into a single phase-shift circuit that can handle multiple serial data signals. By combining the phase-shift functionality rather than creating separate phase-shift circuits for each signal, the system achieves accurate sampling while minimizing device complexity.
Solution Approach 2:
The phase-shift circuit is designed with multi-functionality to serve multiple serial data signals simultaneously. This universal design allows a single circuit to perform the phase adjustment task for all data signals, reducing the overall number of components while maintaining sampling accuracy for each signal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables stable data reproduction even with large high-speed relative jitter, allowing the phase of the clock to correctly follow the serial data signal, improving data reception accuracy and reducing the complexity of phase control.
Implementation Method 1
a voltage-controlled oscillator, frequency divider, phase comparator, and selection circuit to manage alarm signals and phase feedback
Data Source
AI summary
A communication system includes a transmission apparatus for transmitting a plurality of serial data signals that are synchronized in phase with one another and a clock signal that is synchronized in frequency with the serial data signals; and a receiving apparatus for receiving a plurality of serial data signals and the clock signal transmitted from the transmission apparatus. The receiving apparatus includes a phase synchronization circuit configured to roughly adjust the frequency in accordance with the received clock signal and then generate a reproduction clock that is synchronized in phase with one serial data signal among the plurality of serial data signals, and a phase shifter configured to shift the phase from the reproduction clock and lock the phase to another serial signal.