Clock Data Recovery Circuit for Automotive Vision Jitter Tracking

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Solution Overview

Problem

Automotive vision systems face challenges in clock data recovery due to wide process, voltage, and temperature ranges, as well as susceptibility to electromagnetic interference, which affects signal stability and jitter tracking.

Innovation Solution

A clock data recovery apparatus comprising a slicer circuit, frequency acquisition circuit, phase acquisition circuit, and oscillator circuit, designed to be adaptable to wide temperature ranges, resistant to electromagnetic interference, and featuring good jitter tracking ability, implemented as one or more integrated circuits for automotive vision systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If spread spectrum clocking is introduced to reduce electromagnetic interference, then electromagnetic interference noise peak is reduced, but device complexity increases

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent changes the frequency parameters of the clock signal by applying spread spectrum modulation, which spreads the energy of the clock signal across a wider frequency range. This reduces peak electromagnetic interference while maintaining data transmission integrity, resolving the contradiction between reducing EMI and maintaining system functionality.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If clock data recovery is designed for wide temperature ranges, then temperature adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvetemperature range adaptabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic frequency adjustment mechanisms that allow the clock data recovery circuit to adapt its operating parameters in response to temperature changes. The system continuously monitors and adjusts frequency to maintain optimal performance across wide temperature ranges without requiring complex fixed-design modifications for each temperature condition.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent designs a universal clock data recovery apparatus that can operate across multiple temperature conditions using the same core circuitry. The frequency acquisition and phase acquisition circuits are designed to handle varying temperature conditions through parameter adjustment rather than requiring separate dedicated circuits for each temperature range, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If frequency acquisition and phase acquisition circuits are implemented, then jitter tracking ability is improved, but device complexity increases

Engineering Contradiction:
Improvejitter tracking abilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the frequency acquisition circuit and phase acquisition circuit into an integrated clock data recovery system. These circuits work together to simultaneously acquire and track frequency and phase information from the incoming data signal, improving jitter tracking ability while reducing the complexity that would result from separate independent circuits for each function.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10749664B1Clock data recovery for automotive vision system
Publication Date: 2020.08.18 AMBARELLA INT LP
  • US10749664B1 patent drawing
  • US10749664B1 patent drawing
  • US10749664B1 patent drawing

AI summary

An apparatus includes a slicer circuit, a frequency acquisition circuit, a phase acquisition circuit and an oscillator circuit. The slicer circuit may be configured to (i) generate an output signal by slicing a data signal in response to a clock signal and (ii) generate a crossing signal in response to the data signal and the clock signal. The frequency acquisition circuit may be configured to generate a first control signal and a second control signal in response to the data signal and the clock signal. The phase acquisition circuit may be configured to generate a third control signal in response to the first control signal and the data crossing signal. The oscillator circuit may be configured to generate the clock signal in response to the second control signal and the third control signal. The second control signal may shift an adjustable frequency range of the clock signal.