Clock Data Recovery Circuit With Multi-Band VCO Fast Locking
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Solution Overview
Problem
Display devices face challenges in rapidly generating a clock signal with appropriate frequency corresponding to various data supply speeds, leading to prolonged time for the driver unit to produce the necessary clock signal frequency.
Innovation Solution
A clock data recovery circuit is designed with a phase detector, charge pump, switches, voltage control oscillators, and an oscillator controller, which includes specific configurations and operations to generate a clock signal efficiently by comparing clock signals and adjusting charge amounts, allowing for rapid frequency adaptation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the data supply speed of the timing controller has a wide range, then the timing controller can support various data supply speeds, but it takes an undesirably long time for the driver unit to generate a clock signal having a corresponding frequency
Solution Approach 1:
The voltage control oscillators are divided into multiple oscillators (first VCO, second VCO, third VCO) operating at different frequency bands. Each oscillator is responsible for a specific frequency range, allowing the system to quickly select the appropriate oscillator based on the required data supply speed without needing to tune a single wide-range oscillator, thereby reducing clock signal generation time while maintaining support for various data supply speeds.
Solution Approach 2:
Multiple voltage control oscillators are pre-configured to operate at different frequency bands before operation. The oscillator controller pre-selects the appropriate oscillator based on the required frequency band, eliminating the need for time-consuming frequency tuning during operation. This preliminary configuration enables rapid clock signal generation when data supply speed changes.
2Speed
If multiple voltage control oscillators are used to cover different frequency bands, then the clock signal generation speed is improved, but the device complexity increases
Solution Approach 1:
The oscillator controller performs multiple functions: it selects appropriate oscillators based on frequency requirements, controls the switching between different oscillators, and manages the overall clock signal generation process. This multi-functional control approach simplifies the system architecture by consolidating control logic into a single controller rather than requiring separate control circuits for each oscillator.
Solution Approach 2:
The system dynamically switches between different voltage control oscillators based on the required frequency band. The oscillator controller monitors the data supply speed requirements and activates the appropriate oscillator, enabling the system to adapt its configuration in real-time without manual intervention or complex reconfiguration circuits.
3Measurement precision
If the phase detector continuously adjusts the phase adjustment signal, then the clock signal frequency accuracy is improved, but the response time to frequency changes increases
Solution Approach 1:
Multiple voltage control oscillators are pre-configured to operate at different frequency bands with predetermined frequency ranges. When a frequency change is required, the oscillator controller immediately selects the appropriate pre-configured oscillator, eliminating the need for time-consuming phase adjustment. This preliminary configuration enables both fast response and accurate frequency locking.
Solution Approach 2:
The oscillator controller acts as an intermediary between the phase detector and the voltage control oscillators. Instead of the phase detector directly adjusting the phase adjustment signal for frequency changes, the oscillator controller selects the appropriate oscillator based on frequency band requirements, providing a faster response path while maintaining frequency accuracy through the phase detector's continuous monitoring.
Data Source
AI summary
A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.


