Clock Data Recovery Phase Interpolation Against Destructive Interference
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Solution Overview
Problem
In high-speed data transmission, clock data recovery is hindered by destructive interference among signals with different phases, leading to disabled clock recovery and no output clock signal.
Innovation Solution
A clock data recovery device comprising a phase detector circuitry, signal control circuitry, and phase interpolators that detect the phase of input signals, rearrange control signals, and adjust the phases of output clock signals to prevent destructive interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple clock signals with different phases are used for clock data recovery, then the clock data recovery updating rate is improved, but destructive interference occurs and clock recovery is disabled
Solution Approach 1:
The patent implements periodic switching between different phase interpolators, where each interpolator processes clock signals for a specific time period before switching to the next. This periodic action allows the system to use multiple phases for improved recovery rate while avoiding continuous destructive interference by sequentially activating different phase combinations.
Solution Approach 2:
The patent performs preliminary phase detection and control signal generation before the actual clock data recovery process. The phase detector circuitry预先 detects the phase of incoming signals and generates appropriate control signals, which are then rearranged by the signal control circuitry to prepare the correct phase combinations before they are applied to the phase interpolators, preventing destructive interference from occurring.
2Productivity
If phase interpolators continuously adjust phases of clock signals, then clock data recovery efficiency is improved, but signals with different phases cause destructive interference
Solution Approach 1:
The patent divides the phase adjustment function into multiple separate phase interpolators, each handling a specific phase range or time period. Instead of one interpolator continuously adjusting all phases, the system segments the phase adjustment task across multiple units, reducing the likelihood of destructive interference by distributing the phase adjustment workload and avoiding simultaneous conflicting phase modifications.
Solution Approach 2:
The patent implements periodic switching between different phase interpolators, where each interpolator processes clock signals for a specific time period before switching to the next. This periodic action allows the system to use multiple phases for improved recovery rate while avoiding continuous destructive interference by sequentially activating different phase combinations.
Data Source
AI summary
A clock data recovery device includes a phase detector circuitry, a signal control circuitry, and interpolators. The phase detector is configured to detect a phase of an input signal, according to first clock signals, to generate first control signals, and phases of the first clock signals are different to each other. The signal control circuitry is configured to rearrange the first control signals to output as second control signals. The phase interpolators are configured to output second clock signals and alternatively adjust the phases of the second clock signals according to the second control signals to generate an output clock signal.