Clock Recovery Circuit Phase Training for Reliable Frequency Lock
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Solution Overview
Problem
Existing clock and data recovery circuits face challenges in achieving frequency lock due to channel characteristics, which can result in unreliable phase detection and increased manufacturing costs when using double oversampled clock signals or 180-degree inverted clock signals.
Innovation Solution
A clock and data recovery circuit that includes a phase interpolation circuit, a phase detector, an adjustment circuit, a monitor circuit, a loop filter, and an offset output circuit, which adjusts the phase of a reference clock signal based on phase characteristic data to reduce the impact of channel characteristics during a training period before communication starts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an analog circuit is used to calculate the phase difference between transmitter-side clock signal and receiver-side clock signal using double oversampled clock signal or 180-degree inverted clock signal, then the phase detection accuracy is improved, but the manufacturing cost increases
Solution Approach 1:
The patent replaces the analog circuit (mechanical/electrical system) with a digital phase detector that uses digital signal processing. The digital phase detector calculates phase difference using digital logic circuits and algorithms, eliminating the need for complex analog circuitry while maintaining phase detection accuracy. This substitution of digital for analog systems resolves the contradiction by reducing manufacturing cost and complexity while preserving measurement precision.
2Ease of manufacture
If a phase detector is used to digitally execute phase difference calculation, then the manufacturing cost is reduced, but the frequency lock reliability deteriorates due to channel characteristics influence
Solution Approach 1:
The patent implements a feedback mechanism where the digital phase detector continuously monitors the phase difference between transmitted and received clock signals, and the system adjusts its operation based on this feedback. The feedback loop allows the system to compensate for channel characteristics by dynamically adapting to the actual signal conditions, thereby maintaining frequency lock reliability despite using a cost-effective digital phase detector.
Solution Approach 2:
The patent performs preliminary calibration or training before actual operation to characterize the channel effects. By pre-characterizing the channel characteristics and storing compensation parameters, the system can later compensate for these effects during normal operation. This preliminary action enables the digital phase detector to achieve reliable frequency lock by accounting for channel distortions in advance.
3Device complexity
If the phase detector detection result is used directly without adjustment, then the circuit complexity is reduced, but the phase detection accuracy deteriorates due to channel characteristics
Solution Approach 1:
The patent adjusts key parameters of the phase detection process based on channel characteristics. By dynamically modifying detection parameters such as sampling timing, reference signal selection, or calculation weights, the system optimizes phase detection accuracy for the specific channel conditions without requiring a completely complex circuit architecture. This parameter adjustment approach balances circuit simplicity with detection precision.
Data Source
AI summary
A clock and data recovery circuit includes a phase detector that outputs phase characteristic data based on a digital data signal and an adjustment circuit that adjusts phase characteristic data. The clock and data recovery circuit sets an adjustment value in an adjustment circuit by calculating an adjustment value of phase characteristic data using a monitor circuit while changing a phase of a reference clock signal to be adjusted in a phase interpolation circuit based on offset data output from an offset output circuit in a training period before communication starts.