Clock Data Recovery Circuit With Selective Frequency Tracking

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Solution Overview

Problem

Conventional clock data recovery circuits face challenges in maintaining accurate frequency tracking, especially under low power mode or during USB communication, as they rely on expensive crystal oscillators and require significant circuit board space, and existing auto-tracking methods compromise accuracy when continuously tracking data recovery clocks.

Innovation Solution

A clock data recovery circuit module with a frequency comparison circuit and signal detection circuit that dynamically determines whether to perform frequency tracking by comparing the frequency difference between the data recovery clock and the clock signal, allowing for adjustments based on detection results, thereby reducing the need for continuous tracking and maintaining accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a crystal oscillator is used to generate the reference clock, then the frequency accuracy is improved, but the cost and circuit board space are increased

Engineering Contradiction:
Improvefrequency accuracyVSAvoidcircuit board space
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent replaces the expensive crystal oscillator with a low-cost RC oscillator that generates the reference clock. Although RC oscillators are less accurate, the system compensates through selective frequency tracking only when data signals are present, achieving acceptable accuracy without the high cost and large space requirements of crystal oscillators.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Measurement precision

If frequency tracking is continuously performed, then the frequency accuracy is maintained, but the power consumption is increased during low power mode

Engineering Contradiction:
Improvefrequency accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic frequency tracking by detecting the presence of data signals and enabling frequency comparison only when data is detected. During low power mode or idle periods without data signals, the frequency tracking is suspended, reducing power consumption while maintaining accuracy when needed.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If frequency tracking is continuously performed during USB communication, then the frequency accuracy is maintained, but the data recovery accuracy is decreased

Engineering Contradiction:
Improvefrequency accuracyVSAvoiddata recovery accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies partial frequency tracking by performing frequency comparison only when data signals are detected and not during low power mode. This selective approach avoids the excessive tracking that degrades data recovery accuracy, achieving the right balance between frequency accuracy and data recovery reliability.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9020086B2Clock data recovery circuit module and method for generating data recovery clock
Publication Date: 2015.04.28 PHISON ELECTRONICS
  • US9020086B2 patent drawing
  • US9020086B2 patent drawing
  • US9020086B2 patent drawing

AI summary

A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.