Clock Recovery Circuit Using SSC Compensation for Frequency Tracking

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Clock and data recovery circuits face increased processing load and reduced characteristics when both serial data and PLL clock signals are subjected to spread-spectrum frequency modulation, leading to doubled load and difficulty in tracking frequency deviations.

Innovation Solution

A clock recovery circuit with a phase detector, frequency tracking loop, and phase interpolator that adjusts the clock signal phase based on frequency deviation detection, using spread-spectrum frequency modulation information to offset frequency modulation and reduce the frequency deviation tracked by the loop.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If both serial data and PLL clock signal are subjected to spread-spectrum frequency modulation, then electromagnetic interference is reduced, but processing load doubles and frequency tracking becomes difficult

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidprocessing load
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-obtaining spread-spectrum frequency modulation information from the clock generator before the frequency tracking loop processes the clock signal. This information is used to predict and compensate for frequency deviations in advance, allowing the loop to track only the residual deviations rather than the full spread-spectrum modulation range, thereby reducing processing load while maintaining EMI reduction benefits

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If both serial data and PLL clock signal are subjected to spread-spectrum frequency modulation, then electromagnetic interference is reduced, but frequency deviation tracking range doubles

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidfrequency deviation tracking
Core Design Contradiction:
Object-affected harmful factorsVSDifficulty of detecting and measuring

Solution Approach 1:

The patent extracts the spread-spectrum frequency modulation information from the clock generator and separates it from the frequency tracking function. By taking out this known modulation information and using it to pre-compensate the clock signal, the frequency tracking loop only needs to detect and correct the remaining small deviations between data and clock, rather than tracking the entire spread-spectrum frequency range, thus reducing tracking difficulty

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-affected harmful factors

If frequency deviation tracking range is doubled, then spread-spectrum modulation is effective, but operational speed requirements increase

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidoperational speed
Core Design Contradiction:
Object-affected harmful factorsVSSpeed

Solution Approach 1:

By performing preliminary compensation using the pre-obtained spread-spectrum modulation information, the system reduces the actual tracking range required during operation. The frequency tracking loop operates at lower speed because it only needs to correct residual deviations rather than track the full spread-spectrum frequency swing, thus reducing operational speed requirements while maintaining EMI reduction effectiveness

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9071415B2Semiconductor device
Publication Date: 2015.06.30 RENESAS ELECTRONICS CORP
  • US9071415B2 patent drawing
  • US9071415B2 patent drawing
  • US9071415B2 patent drawing

AI summary

A frequency tracking loop receives a result from a phase detector that detects an advance and a retard of a phase between input data and an extracted clock signal, and conducts a control to reduce a frequency deviation between the input data and the extracted clock signal. A phase interpolator adjusts a phase of the clock signal subjected to spread-spectrum frequency modulation on the basis result of the frequency deviation in the frequency tracking loop, and outputs the extracted clock signal. In the frequency tracking loop, the frequency deviation between the data signal and the clock signal is corrected to offset a variation of the frequency of the clock signal, on the basis of the frequency modulation information related to the clock signal subjected to the spread-spectrum frequency modulation which is input to the phase interpolator. The frequency of the clock signal seemingly follows the frequency of the data signal.