Clock Restoration Nodes for Multi-Network Timing Alignment

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Solution Overview

Problem

In complex packet networks, existing methods struggle to efficiently align clocks across multiple networks due to increasing delay variations and inaccuracies, especially with modern routers and switches introducing significant delays, leading to severe timing issues and reduced performance.

Innovation Solution

A method is introduced to form clusters within networks with bridge functions for clock restoration, using timestamped packets to transmit timing information, identifying optimal intermediate nodes for clock restoration, and generating restored clock signals to minimize delays and inaccuracies by strategically placing clock restoration points.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If clock signals are transmitted over packet networks using existing methods, then clock recovery can be performed, but the delay variation increases dramatically as the number of networks increases

Engineering Contradiction:
Improveclock recovery performanceVSAvoiddelay variation
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the packet network into multiple clock domains separated by domain boundaries. Each domain has its own clock restoration mechanism that operates independently, preventing delay variations from propagating across the entire network. The segmentation is achieved by identifying optimal intermediate nodes for clock restoration and treating them as boundaries that reset the timing reference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary clock restoration nodes between source and destination nodes. These intermediaries receive timestamped packets, determine expected delays, and restore the clock signal at optimal points. The intermediaries act as mediators that compensate for delay variations introduced by routers and switches without requiring physical signal regeneration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the number of networks increases, then network capacity and coverage improve, but the likelihood of timing problems increases exponentially

Engineering Contradiction:
Improvenetwork capacityVSAvoidtiming accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent divides the expanded network into multiple manageable clock domains using segmentation. Each domain is bounded by clock restoration nodes that reset timing references, isolating timing problems to local segments rather than propagating them network-wide. This allows the network to scale in capacity while maintaining timing reliability within each segmented domain.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary clock restoration at identified intermediate nodes before timing errors can accumulate. By proactively restoring clocks at optimal points along the network path, the system prevents timing drift from reaching destination nodes, even as network capacity expands and more intermediate nodes are introduced.

Inventive Principle:
Principle #10Preliminary action

3Speed

If modern routers and switches are used to increase network performance, then data transmission speed improves, but delay introduction increases

Engineering Contradiction:
Improvedata transmission speedVSAvoidprotocol stack handling delay
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent introduces clock restoration intermediaries that compensate for delays introduced by modern routers and switches. These intermediaries measure actual packet delays and use the information to adjust clock restoration timing, effectively neutralizing the impact of protocol stack handling delays and input/output queuing while preserving the high-speed transmission capabilities of modern networking hardware.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback mechanisms where timestamped packets provide information about actual delay experience. This feedback is used to refine clock restoration calculations, allowing the system to adapt to the specific delay characteristics of modern routers and switches. The feedback loop continuously adjusts restoration parameters to maintain timing accuracy despite varying network conditions.

Inventive Principle:
Principle #23Feedback

4Measurement precision

If clock restoration is performed at every intermediate node, then timing accuracy improves, but system complexity increases

Engineering Contradiction:
Improvetiming precisionVSAvoidclock restoration points
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by determining optimal clock restoration points based on specific network conditions at each intermediate node. Not all nodes require clock restoration - only those where timing precision is compromised by delay variations. This selective approach maintains high timing precision where needed while avoiding unnecessary complexity at nodes where the network path is already stable.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses partial action by implementing clock restoration only at a subset of intermediate nodes rather than all nodes. By strategically selecting nodes based on delay characteristics and traffic patterns, the system achieves sufficient timing precision without the excessive complexity of universal restoration. The partial approach is justified when the selected nodes represent critical timing boundaries.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7376156B2Alignment of clocks over multiple packet networks
Publication Date: 2008.05.20 ZARLINK SEMICONDUCTOR INC
  • US7376156B2 patent drawing
  • US7376156B2 patent drawing
  • US7376156B2 patent drawing

AI summary

Disclosed is a method of aligning clocks over multiple networks having different clock domains. The method comprises transmitting timestamped packets over said networks between source and destination nodes, said timestamped packets conveying timing information based on a source clock at said source node, determining the expected delay over multiple nodes for a given traffic density, identifying at least one intermediate node between said source and destination node where said determined expected delay is such as to permit clock restoration within predefined acceptable parameters, restoring said source clock at said at least one intermediate restoration node to generate a restored intermediate clock signal, producing from said restored intermediate clock signal new timestamped packets conveying timing information based on said restored intermediate clock signal, and forwarding said new timestamped packets to said destination node.