Clock Route Delay Measurement Using Skew Circuits and TDC

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Solution Overview

Problem

In integrated circuits, measuring pin-to-pin delays is challenging due to increased delays caused by additional peripheral circuits and routing mismatches on printed circuit boards, which complicates system-level calibration and synchronization of clock signals.

Innovation Solution

A delay measurement circuit that includes skew circuits, conductive traces, and a time-to-digital converter, allowing for the generation of skew and time codes to accurately measure delays between bonding pads without requiring additional circuitry, and accounts for routing mismatches by operating in zero-delay-return and synchronized-pass modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If additional peripheral circuits are added to provide clock redundancy and distribution flexibility, then adaptability and versatility are improved, but device complexity and delay increase

Engineering Contradiction:

Improveclock signal format flexibilityVSAvoidperipheral circuit complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The delay measurement circuit is designed to measure multiple types of pin-to-pin delays (input-to-input, input-to-output, output-to-output) using the same circuit architecture. The circuit can operate in different modes (zero-delay-return path mode and synchronized pass path mode) to accommodate various measurement requirements, providing universal functionality without requiring separate measurement circuits for each delay type.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If additional peripheral circuits are added to provide clock redundancy and distribution flexibility, then adaptability and versatility are improved, but pin-to-pin delay increases

Engineering Contradiction:

Improveinput clock frequency flexibilityVSAvoidpin-to-pin delay

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system performs delay measurement and calibration before actual clock synchronization operations. By measuring pin-to-pin delays in advance and storing calibration data, the system compensates for the additional delays introduced by peripheral circuits, ensuring accurate synchronization without requiring real-time delay adjustment during operation.

Inventive Principle:

Principle #10Preliminary action

3Measurement precision

If system level calibration is performed to compensate for delay variations, then measurement precision is improved, but device complexity and calibration time increase

Engineering Contradiction:

Improvepin-to-pin delay measurement accuracyVSAvoidcalibration system complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The delay measurement circuit is integrated directly into the clock distribution device, allowing the device to perform its own delay measurements and calibrations without requiring external measurement equipment or complex external calibration systems. The circuit uses internal resources (bonding pads, conductive traces, time-to-digital converter) to autonomously characterize its own delay properties.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The calibration process is separated from the normal clock operation process. The delay measurement circuit operates in dedicated calibration modes (zero-delay-return path mode, synchronized pass path mode) that are distinct from regular clock distribution operations. This extraction allows calibration to be performed independently and the results stored for use during normal operation, simplifying the overall system control.

Inventive Principle:

Principle #2Taking out (Extraction)

4Measurement precision

If routing mismatches on printed circuit boards are considered, then measurement precision is improved, but difficulty of detecting and measuring increases

Engineering Contradiction:

Improveroute delay measurement accuracyVSAvoidrouting mismatch measurement complexity

Core Design Contradiction:

Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The measurement approach focuses on local delay characteristics at each bonding pad rather than attempting to measure entire end-to-end paths. By measuring delays from each bonding pad to a common reference point (the time-to-digital converter) and comparing these local measurements, the system can identify and compensate for routing mismatches in the printed circuit board without requiring complex global path analysis.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS12261606B2Measuring pin-to-pin delays between clock routes

Publication Date: 2025.03.25 SKYWORKS SOLUTIONS INC

AI summary

A delay measurement circuit includes a first skew circuit disposed proximate to a first bonding pad configured to receive a first clock signal having a first frequency. The delay measurement circuit includes a second skew circuit disposed proximate to a second bonding pad configured to receive a second clock signal having a second frequency. The first and second skew circuits each have a first mode of operation as zero-delay-return path and a second mode of operation as a synchronized pass path. The delay measurement circuit includes a pair of conductive traces coupled to the first skew circuit, another pair of conductive traces coupled to the second skew circuit, a time-to-digital converter circuit, and a switch circuit configured to selectively couple the time-to-digital converter circuit to the first skew circuit via the pair of conductive traces and the second skew circuit via the other pair of conductive traces.