Clock Distribution Segmentation for Lower Phase Noise Correlation
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Solution Overview
Problem
In antenna array systems for 5G communication, the high correlation of phase noise between reference clock signals affects energy efficiency, particularly when only a subset of integrated circuits is enabled, leading to detrimental impacts on signal quality and energy savings.
Innovation Solution
The use of multiple input terminals for reference clock signals and associated clock-distribution networks with buffer amplifiers in a tree structure within integrated circuits reduces phase noise correlation by isolating the impact of phase noise to specific subsets of communication circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single reference clock signal is distributed to all communication circuits, then device complexity is reduced, but phase noise correlation increases causing detrimental impact on signal quality when only a subset of circuits is enabled
Solution Approach 1:
The patent divides the clock distribution system into multiple independent segments by providing multiple reference clock input terminals (first reference clock input terminal and second reference clock input terminal). Each segment serves a specific subset of communication circuits, thereby reducing phase noise correlation within each segment while maintaining overall system functionality.
Solution Approach 2:
The patent introduces buffer amplifiers as intermediary elements in the clock distribution networks. These buffers isolate the phase noise characteristics of different reference clock signals, preventing direct correlation propagation to the communication circuits while maintaining signal integrity.
2Reliability
If multiple reference clock input terminals are provided with separate clock-distribution networks, then phase noise correlation is reduced improving signal quality, but device complexity increases
Solution Approach 1:
The patent applies local quality by providing different reference clock signals to different subsets of communication circuits based on their specific requirements. Each communication circuit or subset receives a reference clock signal with appropriate characteristics for its function, optimizing signal quality locally while managing overall complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes the impact of phase noise on signal quality, improving energy efficiency and reducing phase noise correlation among communication circuits, even when only a subset of integrated circuits is enabled, thereby enhancing overall signal quality and energy savings.
Implementation Method 1
The use of multiple input terminals for reference clock signals and associated clock-distribution networks with buffer amplifiers in a tree structure within integrated circuits reduces phase noise correlation by isolating the impact of phase noise to specific subsets of communication circuits.
Data Source
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AI summary
An integrated circuit (10, 10a-d) is disclosed, which is configured to be connected to an antenna module (3) having multiple antenna elements (17). The integrated circuit (10, 10a-d) comprises a plurality of communications circuits (50 j ), each of which is configured to be connected to an antenna element (17) of the antenna module (3). It also comprises a first clock input terminal (551) configured to receive a reference clock signal from outside the integrated circuit (10, 10a-d) and a first clock-distribution network (601) connected between the first clock input terminal (551) and a first subset (651) of the communication circuits (50 j ). Furthermore, it comprises a second clock input terminal (552) configured to receive a reference clock signal from outside the integrated circuit (10, 10a-d) and a second clock-distribution network (601) connected between the second clock input terminal (552) and a second subset (652) of the communication circuits (50 j ).