Clock Selection Circuit Power Reduction via Emission Control
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Solution Overview
Problem
Existing display devices face challenges in reducing power consumption, particularly in the clock selection circuits that drive scan and emission control lines.
Innovation Solution
A clock selection circuit is designed with an inverter and controllers that include transmission gates with P-type and N-type transistors, allowing for selective supply of clock signals to scan drivers based on emission control signals, thereby minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock signals are continuously supplied to scan drivers, then the display device can operate without interruption, but power consumption increases
Solution Approach 1:
The patent implements periodic clock signal supply by using emission control signals to gate the clock signals to scan drivers only during active display periods. The clock selection circuit receives clock signals and selectively passes them to scan drivers based on the emission control signal state, creating a periodic on/off pattern that matches the display activation schedule.
Solution Approach 2:
The patent dynamically adjusts clock signal supply by incorporating emission control signals that respond to actual display needs. The clock selection circuit transitions between connected and disconnected states based on real-time emission control signal inputs, making the system adaptive rather than static.
2Use of energy by moving object
If clock selection circuits are added to selectively supply clock signals, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent merges the clock selection function with existing emission control signal pathways. The clock selection circuit utilizes the same emission control signals that already control pixel emission, combining multiple control functions into a unified signal distribution system rather than adding entirely separate control mechanisms.
Solution Approach 2:
The clock selection circuit acts as an intermediary component between the clock signal source and scan drivers. This mediator selectively connects or disconnects based on emission control signals, providing a simple gating mechanism that adds minimal complexity while achieving effective power management.
Data Source
AI summary
According to one or more embodiments of the present disclosure, a clock selection circuit includes an inverter configured to receive an input signal through a first input terminal, and at least one controller configured to receive at least one clock signal and configured to output the clock signal when the input signal is supplied to the inverter.