Clock Selection Circuit for MCU Power State Transitions
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Solution Overview
Problem
Existing microcontroller units (MCUs) face challenges in efficiently managing power consumption by transitioning between active and inactive states, as they often require software execution to adjust clock frequencies, leading to inefficiencies in power management.
Innovation Solution
A clock selection circuit regulates the processor's clock frequency without relying on software execution, allowing the MCU to transition between power states by providing different clock signals based on the processor's power consumption state, thereby optimizing power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If software execution is used to adjust clock frequency, then the processor can transition between power states, but the time efficiency in waking up the processor is reduced
Solution Approach 1:
The patent replaces the software-based clock frequency adjustment mechanism with a hardware-based clock selection circuit. This circuit automatically selects between different clock sources (high-frequency and low-frequency oscillators) based on the processor's power state, eliminating the need for software execution during state transitions and thereby reducing wake-up time.
Solution Approach 2:
The clock selection circuit is pre-configured with multiple clock sources and automatically switches between them based on the processor's power state. By having the clock switching capability prepared in advance at the hardware level, the system can immediately transition between power states without waiting for software execution, thus reducing wake-up time while maintaining power efficiency.
2Use of energy by moving object
If software execution is used to adjust clock frequency, then the processor can manage power states, but the duration of suspend mode is reduced
Solution Approach 1:
The patent replaces the software-based clock frequency adjustment mechanism with a hardware-based clock selection circuit. This circuit automatically selects between different clock sources (high-frequency and low-frequency oscillators) based on the processor's power state, eliminating the need for software execution during state transitions and thereby reducing wake-up time.
Solution Approach 2:
The clock selection circuit operates autonomously to manage clock frequency based on the processor's power state without requiring software intervention. This self-service capability allows the system to maintain suspend mode for longer durations since the hardware automatically handles clock switching, reducing power consumption over extended periods without software overhead.
3Ease of operation
If software execution is used to adjust clock frequency, then the processor can transition between power states, but power dissipation savings are reduced
Solution Approach 1:
The patent replaces the software-based clock frequency adjustment mechanism with a hardware-based clock selection circuit. This circuit automatically selects between different clock sources (high-frequency and low-frequency oscillators) based on the processor's power state, eliminating the need for software execution during state transitions and thereby reducing wake-up time.
Solution Approach 2:
The clock selection circuit operates autonomously to manage clock frequency based on the processor's power state without requiring software intervention. This self-service capability allows the system to maintain suspend mode for longer durations since the hardware automatically handles clock switching, reducing power consumption over extended periods without software overhead.
Data Source
AI summary
A technique includes clocking a processor; and in response to the processor providing a signal indicating that the processor is transitioning between a first power state that is associated with a first power consumption and a second power state that is associated with a second power consumption different than the first power consumption, changing a frequency of the clocking.


