Clock Signal Comparison for GPS Timing Interference Detection

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Solution Overview

Problem

GPS timing signals are vulnerable to spoofing and jamming techniques, which can disrupt the accuracy and reliability of GPS-based systems, posing significant threats to critical infrastructure such as electric grids, data networks, and transportation systems.

Innovation Solution

A system that includes an atomic clock providing a local clock signal and a receiver accepting an external timing reference signal, which compares the local clock signal to the external signal. When divergence is detected, a warning is generated, and the system can switch to the local clock signal as an alternate, trusted reference, automatically re-checking for signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If GPS timing signals are used for system operation, then system functionality and productivity are maintained, but the system becomes vulnerable to spoofing and jamming attacks that compromise reliability and accuracy

Engineering Contradiction:
Improvesystem operation continuityVSAvoidtiming signal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a mediator component that compares the external GPS timing signal with a local reference clock signal. This intermediary comparison mechanism detects discrepancies between the two signals, allowing the system to identify spoofing or jamming attacks while maintaining continuous operation using the local clock as a fallback reference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary comparison of the external timing signal against the local reference clock before fully relying on the external signal. By预先 establishing a trusted local reference and continuously comparing signals, the system can detect interference early and switch to the local reference clock to maintain reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the system switches to a local clock signal when divergence is detected, then reliability and accuracy are maintained, but device complexity increases due to the need for dual clock references and comparison mechanisms

Engineering Contradiction:
Improvetiming signal accuracyVSAvoiddual clock reference system
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a simplified copying approach where the local reference clock serves as a backup copy of the timing reference. Instead of implementing complex verification mechanisms, the system maintains a local copy of the timing reference and simply compares the external signal against this copy, reducing overall system complexity while maintaining reliability.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system monitors parameter changes (timing discrepancies) between the external and local clock signals. When the divergence exceeds a threshold, the system automatically switches references. This parameter-based approach simplifies the complexity by using a clear, quantifiable switching criterion rather than complex decision logic.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the system continuously monitors and compares timing signals for interference detection, then reliability is improved, but energy consumption increases

Engineering Contradiction:
Improveinterference detection capabilityVSAvoidenergy consumption for signal monitoring
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic monitoring of the timing signals rather than continuous monitoring. The system compares the external timing signal with the local reference clock at regular intervals, which reduces energy consumption while still maintaining effective interference detection capability for critical infrastructure operations.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20250189677A1Timing signals comparison for interference detection
Publication Date: 2025.06.12 INFLEQTION QUANTUM LLC
  • US20250189677A1 patent drawing
  • US20250189677A1 patent drawing
  • US20250189677A1 patent drawing

AI summary

A system includes an atomic clock providing a local reference clock signal, an external clock interface receiving an external clock signal, and a comparator comparing the local and external clock signals. In response, the comparator generates a comparison output signal. An interference detection system receives this signal and determines if the external clock signal contains an interference component. The system then outputs an alert signal to indicate the presence of interference.