Clock Signal Calibration for Low-Power Phase Alignment
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Solution Overview
Problem
Electronic devices face challenges in maintaining desired phase relationships between clock signals over time, leading to power consumption issues due to complex timing control mechanisms like phase lock loops when not processing data.
Innovation Solution
A signal calibration method that automatically reacquires desired phase relationships by comparing phases of locally generated clock signals with a reference, using a clock divider and phase selector to identify and adjust subsets of clock signals, even after power cycles or signal glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a phase lock loop is used to maintain phase relationships over time, then phase stability is improved, but power consumption increases
Solution Approach 1:
The patent implements calibration at specific periods or intervals rather than continuous operation. The system performs calibration operations periodically to reacquire desired phase relationships, allowing the timing control mechanism to be simplified or powered down between calibration events, thereby reducing overall power consumption while maintaining phase stability when needed.
2Use of energy by moving object
If timing control mechanisms are simplified to reduce power consumption, then power usage is improved, but phase relationship accuracy deteriorates
Solution Approach 1:
The patent performs calibration operations in advance or at designated intervals before phase relationships drift significantly. By proactively recalibrating phase relationships at periodic intervals or upon specific events (such as wake-up from idle state), the system maintains accuracy without requiring continuous complex control mechanisms, thus balancing power consumption with precision.
3Stability of the object's composition
If complex timing control mechanisms are used, then phase relationship maintenance is improved, but device complexity increases
Solution Approach 1:
The patent extracts or removes the complex continuous control mechanism (phase lock loop) and replaces it with a simpler system that performs calibration at specific intervals or events. By taking out the continuously operating complex mechanism and using event-driven or periodic calibration instead, the system reduces device complexity while maintaining phase relationship stability when required.
Data Source
AI summary
In a signal calibration scheme, a desired phase relationship is maintained between a set of signals. For example, in some aspects the desired phase of a clock tree generated from a high speed reference clock signal may be maintained by detecting phase differences between a low speed reference clock signal and low speed clock signals associated with different phases of the clock tree. In some aspects, the desired phase of a clock tree may be maintained by detecting framing offsets that occur through the use of the clock tree.