Clock Signal Synchronization via Timing Packets
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Solution Overview
Problem
Existing techniques for synchronizing clock signals between interworking functions (IWFs) in packet networks without access to a primary reference clock (PRC) require specialized circuitry and modifications to network switches, and lack efficient methods for phase locking Ethernet clock signals to PRC signals.
Innovation Solution
A timing analyzer is integrated into network switches to determine timing relationships between Ethernet clock signals and PRC signals, generating a traceable PRC signal that allows IWFs to synchronize clock signals without direct access to a PRC, using timing packets to maintain synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase locking techniques are used to synchronize Ethernet clock signals to PRC signals, then clock signal synchronization is achieved, but specialized circuitry and modifications to network switches are required
Solution Approach 1:
The patent introduces timing packets as an intermediary mechanism to convey timing information between IWFs. These packets contain timestamp data that allows destination IWFs to regenerate synchronized clock signals without requiring direct phase locking circuitry. The timing packets serve as a software-based mediator that replaces complex hardware synchronization mechanisms.
Solution Approach 2:
The patent replaces the mechanical/electrical phase locking system with a software-based timing packet exchange mechanism. Instead of using hardware phase lock loops and specialized synchronization circuitry, the system uses standardized network packets to transmit timing information, which can be processed by general-purpose network equipment without specialized modifications.
2Ease of operation
If IWFs have direct access to PRC signals, then clock synchronization is simplified, but this requires direct connection to primary reference clocks which are not always available
Solution Approach 1:
The patent creates a virtual copy of the PRC signal timing characteristics through timing packets. Instead of requiring direct access to the physical PRC signal, the system transmits timing information that replicates the PRC signal's temporal characteristics. Destination IWFs use these timing copies to generate locally synchronized clock signals, making the system adaptable to locations without direct PRC access.
Solution Approach 2:
The patent segments the clock synchronization function into separate components: timing information extraction at the source IWF, timing packet transmission through the network, and timing information processing at the destination IWF. This segmentation allows each component to operate independently, enabling synchronization without requiring all IWFs to have direct PRC access.
3Measurement precision
If specialized circuitry is implemented for phase locking, then clock synchronization precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent enables IWFs to perform their own clock synchronization using standard network equipment and software processing. Instead of relying on specialized phase locking circuitry, each IWF independently processes timing packets to generate its own synchronized clock signal. This self-service approach maintains precision while eliminating the need for complex specialized hardware.
Data Source
AI summary
An interworking function (IWF) is coupled to a switch of a packet network and communicates with the network switch based on an Ethernet clock signal or some other type of clock signal. A primary reference clock (PRC) of the network generates a PRC signal, and a timing analyzer determines timing information indicative of timing relationships between the Ethernet clock signal and the PRC signal. The timing analyzer periodically transmits such timing information, and the IWF uses the timing information to generate a PRC signal that is traceable to the network PRC signal.