Clock Simulation System Using Separate Event Scheduling
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Solution Overview
Problem
Existing hardware simulators face inefficiencies in simulating complex digital circuits due to the need to schedule every transition of clock signals as logic events, leading to increased processing time and complexity, especially with repetitive signals.
Innovation Solution
A system and method that utilize clock-scheduled events, where the occurrence time is defined relative to attributes of a clock signal, such as period and phase, allowing for the prediction of events without scheduling each transition in a time-scheduled event queue, using a hardware simulator with separate data structures for clock-scheduled events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If every transition of clock signals is scheduled as logic events in traditional hardware simulators, then accurate simulation of clocked circuits is achieved, but processing time and complexity increase significantly
Solution Approach 1:
The patent segments event scheduling into two distinct types: time-scheduled events (for logic signals) and clock-scheduled events (for clock signals). This segmentation allows the simulator to treat clock signal transitions differently from logic signal transitions, scheduling clock events based on their periodic nature rather than treating every transition as a separate logic event, thereby reducing processing time while maintaining simulation accuracy.
Solution Approach 2:
The patent changes the scheduling parameter from absolute time-based scheduling to clock-cycle-based scheduling. Instead of scheduling events based on simulation time, the system schedules clock-scheduled events based on the clock signal's period and phase attributes. This parameter change enables efficient handling of repetitive clock signals by leveraging their predictable periodic behavior rather than treating each transition independently.
2Reliability
If every transition of clock signals is scheduled as logic events, then complete event processing is ensured, but device complexity increases
Solution Approach 1:
The patent divides the event scheduling system into two separate data structures: a time-scheduled event queue for logic signals and a clock-scheduled event queue for clock signals. This segmentation simplifies the overall complexity by allowing each queue to be managed with simpler, specialized logic rather than using a single complex unified scheduling mechanism that must handle both signal types.
Solution Approach 2:
The patent introduces a clock scheduler as an intermediary component that专门 handles clock signal scheduling. This intermediary abstracts the complexity of clock signal management from the main event processing system, allowing the clock scheduler to handle periodic timing based on clock attributes (period, phase) while the main simulator processes only the resulting events, thereby reducing overall system complexity.
3Ease of operation
If traditional time-scheduled event queues are used for all events, then simple event processing is maintained, but simulation speed decreases
Solution Approach 1:
The patent segments event processing into two paths: simple time-scheduled event processing for logic signals and specialized clock-scheduled event processing for clock signals. This segmentation allows the simulator to maintain simple event processing for the majority of signals while applying optimized processing only where needed (for clock signals), thereby improving overall simulation speed without sacrificing ease of operation for standard logic events.
Solution Approach 2:
The patent changes the scheduling parameter for clock signals from simulation time to clock cycle count. This parameter change enables faster event prediction and processing for clock signals, as the clock scheduler can directly calculate when clock edges will occur based on the clock period and current cycle count, eliminating the need for complex time-based event queue management and significantly improving simulation speed.
Data Source
AI summary
A simulation system, a computer product to implement a simulation method, and a method of simulating a digital circuit that has at least one element and at least one clock signal having clock attributes. The method includes maintaining a data structure for time-scheduled events scheduled to occur at particular simulation-times; and maintaining a data structure for clock-scheduled events each corresponding to a particular clock signal and scheduled to occur at a time that can be determined from at least one attribute of the clock signal, such that clocked-scheduled events are distinguishable from time-scheduled events, and such that each and every transition of any clock signal need not be scheduled in the time-scheduled event data structure.